Init project on STM8 V1
This commit is contained in:
thaonguyen
2834
Serial/inc/stm8s.h
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2834
Serial/inc/stm8s.h
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File diff suppressed because it is too large
Load Diff
338
Serial/inc/stm8s_adc1.h
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338
Serial/inc/stm8s_adc1.h
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/**
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******************************************************************************
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* @file stm8s_adc1.h
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* @author MCD Application Team
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* @version V2.3.0
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* @date 16-June-2017
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* @brief This file contains all the prototypes/macros for the ADC1 peripheral.
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******************************************************************************
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* @attention
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*
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* <h2><center>© COPYRIGHT 2014 STMicroelectronics</center></h2>
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*
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* Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
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* You may not use this file except in compliance with the License.
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* You may obtain a copy of the License at:
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*
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* http://www.st.com/software_license_agreement_liberty_v2
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS,
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* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*
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******************************************************************************
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*/
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/* Define to prevent recursive inclusion -------------------------------------*/
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#ifndef __STM8S_ADC1_H
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#define __STM8S_ADC1_H
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/* Includes ------------------------------------------------------------------*/
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#include "stm8s.h"
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/* Exported types ------------------------------------------------------------*/
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/** @addtogroup ADC1_Exported_Types
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* @{
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*/
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/**
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* @brief ADC1 clock prescaler selection
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*/
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typedef enum
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{
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ADC1_PRESSEL_FCPU_D2 = (uint8_t)0x00, /**< Prescaler selection fADC1 = fcpu/2 */
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ADC1_PRESSEL_FCPU_D3 = (uint8_t)0x10, /**< Prescaler selection fADC1 = fcpu/3 */
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ADC1_PRESSEL_FCPU_D4 = (uint8_t)0x20, /**< Prescaler selection fADC1 = fcpu/4 */
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ADC1_PRESSEL_FCPU_D6 = (uint8_t)0x30, /**< Prescaler selection fADC1 = fcpu/6 */
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ADC1_PRESSEL_FCPU_D8 = (uint8_t)0x40, /**< Prescaler selection fADC1 = fcpu/8 */
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ADC1_PRESSEL_FCPU_D10 = (uint8_t)0x50, /**< Prescaler selection fADC1 = fcpu/10 */
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ADC1_PRESSEL_FCPU_D12 = (uint8_t)0x60, /**< Prescaler selection fADC1 = fcpu/12 */
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ADC1_PRESSEL_FCPU_D18 = (uint8_t)0x70 /**< Prescaler selection fADC1 = fcpu/18 */
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} ADC1_PresSel_TypeDef;
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/**
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* @brief ADC1 External conversion trigger event selection
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*/
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typedef enum
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{
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ADC1_EXTTRIG_TIM = (uint8_t)0x00, /**< Conversion from Internal TIM1 TRGO event */
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ADC1_EXTTRIG_GPIO = (uint8_t)0x10 /**< Conversion from External interrupt on ADC_ETR pin*/
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} ADC1_ExtTrig_TypeDef;
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/**
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* @brief ADC1 data alignment
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*/
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typedef enum
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{
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ADC1_ALIGN_LEFT = (uint8_t)0x00, /**< Data alignment left */
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ADC1_ALIGN_RIGHT = (uint8_t)0x08 /**< Data alignment right */
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} ADC1_Align_TypeDef;
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/**
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* @brief ADC1 Interrupt source
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*/
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typedef enum
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{
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ADC1_IT_AWDIE = (uint16_t)0x010, /**< Analog WDG interrupt enable */
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ADC1_IT_EOCIE = (uint16_t)0x020, /**< EOC interrupt enable */
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ADC1_IT_AWD = (uint16_t)0x140, /**< Analog WDG status */
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ADC1_IT_AWS0 = (uint16_t)0x110, /**< Analog channel 0 status */
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ADC1_IT_AWS1 = (uint16_t)0x111, /**< Analog channel 1 status */
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ADC1_IT_AWS2 = (uint16_t)0x112, /**< Analog channel 2 status */
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ADC1_IT_AWS3 = (uint16_t)0x113, /**< Analog channel 3 status */
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ADC1_IT_AWS4 = (uint16_t)0x114, /**< Analog channel 4 status */
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ADC1_IT_AWS5 = (uint16_t)0x115, /**< Analog channel 5 status */
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ADC1_IT_AWS6 = (uint16_t)0x116, /**< Analog channel 6 status */
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ADC1_IT_AWS7 = (uint16_t)0x117, /**< Analog channel 7 status */
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ADC1_IT_AWS8 = (uint16_t)0x118, /**< Analog channel 8 status */
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ADC1_IT_AWS9 = (uint16_t)0x119, /**< Analog channel 9 status */
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ADC1_IT_AWS12 = (uint16_t)0x11C, /**< Analog channel 12 status */
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/* refer to product datasheet for channel 12 availability */
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ADC1_IT_EOC = (uint16_t)0x080 /**< EOC pending bit */
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} ADC1_IT_TypeDef;
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/**
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* @brief ADC1 Flags
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*/
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typedef enum
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{
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ADC1_FLAG_OVR = (uint8_t)0x41, /**< Overrun status flag */
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ADC1_FLAG_AWD = (uint8_t)0x40, /**< Analog WDG status */
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ADC1_FLAG_AWS0 = (uint8_t)0x10, /**< Analog channel 0 status */
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ADC1_FLAG_AWS1 = (uint8_t)0x11, /**< Analog channel 1 status */
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ADC1_FLAG_AWS2 = (uint8_t)0x12, /**< Analog channel 2 status */
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ADC1_FLAG_AWS3 = (uint8_t)0x13, /**< Analog channel 3 status */
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ADC1_FLAG_AWS4 = (uint8_t)0x14, /**< Analog channel 4 status */
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ADC1_FLAG_AWS5 = (uint8_t)0x15, /**< Analog channel 5 status */
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ADC1_FLAG_AWS6 = (uint8_t)0x16, /**< Analog channel 6 status */
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ADC1_FLAG_AWS7 = (uint8_t)0x17, /**< Analog channel 7 status */
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ADC1_FLAG_AWS8 = (uint8_t)0x18, /**< Analog channel 8 status*/
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ADC1_FLAG_AWS9 = (uint8_t)0x19, /**< Analog channel 9 status */
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ADC1_FLAG_AWS12 = (uint8_t)0x1C, /**< Analog channel 12 status */
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/* refer to product datasheet for channel 12 availability */
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ADC1_FLAG_EOC = (uint8_t)0x80 /**< EOC falg */
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}ADC1_Flag_TypeDef;
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/**
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* @brief ADC1 schmitt Trigger
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*/
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typedef enum
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{
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ADC1_SCHMITTTRIG_CHANNEL0 = (uint8_t)0x00, /**< Schmitt trigger disable on AIN0 */
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ADC1_SCHMITTTRIG_CHANNEL1 = (uint8_t)0x01, /**< Schmitt trigger disable on AIN1 */
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ADC1_SCHMITTTRIG_CHANNEL2 = (uint8_t)0x02, /**< Schmitt trigger disable on AIN2 */
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ADC1_SCHMITTTRIG_CHANNEL3 = (uint8_t)0x03, /**< Schmitt trigger disable on AIN3 */
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ADC1_SCHMITTTRIG_CHANNEL4 = (uint8_t)0x04, /**< Schmitt trigger disable on AIN4 */
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ADC1_SCHMITTTRIG_CHANNEL5 = (uint8_t)0x05, /**< Schmitt trigger disable on AIN5 */
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ADC1_SCHMITTTRIG_CHANNEL6 = (uint8_t)0x06, /**< Schmitt trigger disable on AIN6 */
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ADC1_SCHMITTTRIG_CHANNEL7 = (uint8_t)0x07, /**< Schmitt trigger disable on AIN7 */
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ADC1_SCHMITTTRIG_CHANNEL8 = (uint8_t)0x08, /**< Schmitt trigger disable on AIN8 */
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ADC1_SCHMITTTRIG_CHANNEL9 = (uint8_t)0x09, /**< Schmitt trigger disable on AIN9 */
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ADC1_SCHMITTTRIG_CHANNEL12 = (uint8_t)0x0C, /**< Schmitt trigger disable on AIN12 */
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/* refer to product datasheet for channel 12 availability */
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ADC1_SCHMITTTRIG_ALL = (uint8_t)0xFF /**< Schmitt trigger disable on All channels */
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} ADC1_SchmittTrigg_TypeDef;
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/**
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* @brief ADC1 conversion mode selection
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*/
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typedef enum
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{
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ADC1_CONVERSIONMODE_SINGLE = (uint8_t)0x00, /**< Single conversion mode */
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ADC1_CONVERSIONMODE_CONTINUOUS = (uint8_t)0x01 /**< Continuous conversion mode */
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} ADC1_ConvMode_TypeDef;
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/**
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* @brief ADC1 analog channel selection
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*/
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typedef enum
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{
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ADC1_CHANNEL_0 = (uint8_t)0x00, /**< Analog channel 0 */
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ADC1_CHANNEL_1 = (uint8_t)0x01, /**< Analog channel 1 */
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ADC1_CHANNEL_2 = (uint8_t)0x02, /**< Analog channel 2 */
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ADC1_CHANNEL_3 = (uint8_t)0x03, /**< Analog channel 3 */
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ADC1_CHANNEL_4 = (uint8_t)0x04, /**< Analog channel 4 */
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ADC1_CHANNEL_5 = (uint8_t)0x05, /**< Analog channel 5 */
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ADC1_CHANNEL_6 = (uint8_t)0x06, /**< Analog channel 6 */
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ADC1_CHANNEL_7 = (uint8_t)0x07, /**< Analog channel 7 */
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ADC1_CHANNEL_8 = (uint8_t)0x08, /**< Analog channel 8 */
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ADC1_CHANNEL_9 = (uint8_t)0x09, /**< Analog channel 9 */
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ADC1_CHANNEL_12 = (uint8_t)0x0C /**< Analog channel 12 */
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/* refer to product datasheet for channel 12 availability */
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} ADC1_Channel_TypeDef;
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/**
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* @}
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*/
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/* Exported constants --------------------------------------------------------*/
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/* Exported macros ------------------------------------------------------------*/
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/* Private macros ------------------------------------------------------------*/
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/** @addtogroup ADC1_Private_Macros
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* @brief Macros used by the assert function to check the different functions parameters.
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* @{
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*/
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/**
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* @brief Macro used by the assert function to check the different prescaler's values.
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*/
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#define IS_ADC1_PRESSEL_OK(PRESCALER) (((PRESCALER) == ADC1_PRESSEL_FCPU_D2) || \
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((PRESCALER) == ADC1_PRESSEL_FCPU_D3) || \
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((PRESCALER) == ADC1_PRESSEL_FCPU_D4) || \
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((PRESCALER) == ADC1_PRESSEL_FCPU_D6) || \
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((PRESCALER) == ADC1_PRESSEL_FCPU_D8) || \
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((PRESCALER) == ADC1_PRESSEL_FCPU_D10) || \
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((PRESCALER) == ADC1_PRESSEL_FCPU_D12) || \
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((PRESCALER) == ADC1_PRESSEL_FCPU_D18))
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/**
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* @brief Macro used by the assert function to check the different external trigger values.
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*/
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#define IS_ADC1_EXTTRIG_OK(EXTRIG) (((EXTRIG) == ADC1_EXTTRIG_TIM) || \
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((EXTRIG) == ADC1_EXTTRIG_GPIO))
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/**
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* @brief Macro used by the assert function to check the different alignment modes.
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*/
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#define IS_ADC1_ALIGN_OK(ALIGN) (((ALIGN) == ADC1_ALIGN_LEFT) || \
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((ALIGN) == ADC1_ALIGN_RIGHT))
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/**
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* @brief Macro used by the assert function to check the Interrupt source.
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*/
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#define IS_ADC1_IT_OK(IT) (((IT) == ADC1_IT_EOCIE) || \
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((IT) == ADC1_IT_AWDIE))
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/**
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* @brief Macro used by the assert function to check the ADC1 Flag.
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*/
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#define IS_ADC1_FLAG_OK(FLAG) (((FLAG) == ADC1_FLAG_EOC)|| \
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((FLAG) == ADC1_FLAG_OVR) || \
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((FLAG) == ADC1_FLAG_AWD) || \
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((FLAG) == ADC1_FLAG_AWS0) || \
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((FLAG) == ADC1_FLAG_AWS1) || \
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((FLAG) == ADC1_FLAG_AWS2) || \
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((FLAG) == ADC1_FLAG_AWS3) || \
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((FLAG) == ADC1_FLAG_AWS4) || \
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((FLAG) == ADC1_FLAG_AWS5) || \
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((FLAG) == ADC1_FLAG_AWS6) || \
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((FLAG) == ADC1_FLAG_AWS7) || \
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((FLAG) == ADC1_FLAG_AWS8) || \
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((FLAG) == ADC1_FLAG_AWS9))
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/**
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* @brief Macro used by the assert function to check the ADC1 pending bits.
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*/
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#define IS_ADC1_ITPENDINGBIT_OK(ITPENDINGBIT) (((ITPENDINGBIT) == ADC1_IT_EOC) || \
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((ITPENDINGBIT) == ADC1_IT_AWD) || \
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((ITPENDINGBIT) == ADC1_IT_AWS0) || \
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((ITPENDINGBIT) == ADC1_IT_AWS1) || \
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((ITPENDINGBIT) == ADC1_IT_AWS2) || \
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((ITPENDINGBIT) == ADC1_IT_AWS3) || \
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((ITPENDINGBIT) == ADC1_IT_AWS4) || \
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((ITPENDINGBIT) == ADC1_IT_AWS5) || \
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((ITPENDINGBIT) == ADC1_IT_AWS6) || \
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((ITPENDINGBIT) == ADC1_IT_AWS7) || \
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((ITPENDINGBIT) == ADC1_IT_AWS8) || \
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((ITPENDINGBIT) == ADC1_IT_AWS12) || \
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((ITPENDINGBIT) == ADC1_IT_AWS9))
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/**
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* @brief Macro used by the assert function to check the different schmitt trigger values.
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*/
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#define IS_ADC1_SCHMITTTRIG_OK(SCHMITTTRIG) (((SCHMITTTRIG) == ADC1_SCHMITTTRIG_CHANNEL0) || \
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((SCHMITTTRIG) == ADC1_SCHMITTTRIG_CHANNEL1) || \
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((SCHMITTTRIG) == ADC1_SCHMITTTRIG_CHANNEL2) || \
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((SCHMITTTRIG) == ADC1_SCHMITTTRIG_CHANNEL3) || \
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((SCHMITTTRIG) == ADC1_SCHMITTTRIG_CHANNEL4) || \
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((SCHMITTTRIG) == ADC1_SCHMITTTRIG_CHANNEL5) || \
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((SCHMITTTRIG) == ADC1_SCHMITTTRIG_CHANNEL6) || \
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((SCHMITTTRIG) == ADC1_SCHMITTTRIG_CHANNEL7) || \
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((SCHMITTTRIG) == ADC1_SCHMITTTRIG_CHANNEL8) || \
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((SCHMITTTRIG) == ADC1_SCHMITTTRIG_CHANNEL12) || \
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((SCHMITTTRIG) == ADC1_SCHMITTTRIG_ALL) || \
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((SCHMITTTRIG) == ADC1_SCHMITTTRIG_CHANNEL9))
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/**
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* @brief Macro used by the assert function to check the different conversion modes.
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*/
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#define IS_ADC1_CONVERSIONMODE_OK(MODE) (((MODE) == ADC1_CONVERSIONMODE_SINGLE) || \
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((MODE) == ADC1_CONVERSIONMODE_CONTINUOUS))
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/**
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* @brief Macro used by the assert function to check the different channels values.
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*/
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#define IS_ADC1_CHANNEL_OK(CHANNEL) (((CHANNEL) == ADC1_CHANNEL_0) || \
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((CHANNEL) == ADC1_CHANNEL_1) || \
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((CHANNEL) == ADC1_CHANNEL_2) || \
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((CHANNEL) == ADC1_CHANNEL_3) || \
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((CHANNEL) == ADC1_CHANNEL_4) || \
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((CHANNEL) == ADC1_CHANNEL_5) || \
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((CHANNEL) == ADC1_CHANNEL_6) || \
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((CHANNEL) == ADC1_CHANNEL_7) || \
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((CHANNEL) == ADC1_CHANNEL_8) || \
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((CHANNEL) == ADC1_CHANNEL_12) || \
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((CHANNEL) == ADC1_CHANNEL_9))
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/**
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* @brief Macro used by the assert function to check the possible buffer values.
|
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*/
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#define IS_ADC1_BUFFER_OK(BUFFER) ((BUFFER) <= (uint8_t)0x09)
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/**
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* @}
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*/
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/* Exported functions ------------------------------------------------------- */
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/** @addtogroup ADC1_Exported_Functions
|
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* @{
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*/
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void ADC1_DeInit(void);
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void ADC1_Init(ADC1_ConvMode_TypeDef ADC1_ConversionMode,
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ADC1_Channel_TypeDef ADC1_Channel,
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ADC1_PresSel_TypeDef ADC1_PrescalerSelection,
|
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ADC1_ExtTrig_TypeDef ADC1_ExtTrigger,
|
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FunctionalState ADC1_ExtTriggerState, ADC1_Align_TypeDef ADC1_Align,
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ADC1_SchmittTrigg_TypeDef ADC1_SchmittTriggerChannel,
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||||
FunctionalState ADC1_SchmittTriggerState);
|
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void ADC1_Cmd(FunctionalState NewState);
|
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void ADC1_ScanModeCmd(FunctionalState NewState);
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void ADC1_DataBufferCmd(FunctionalState NewState);
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void ADC1_ITConfig(ADC1_IT_TypeDef ADC1_IT, FunctionalState NewState);
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void ADC1_PrescalerConfig(ADC1_PresSel_TypeDef ADC1_Prescaler);
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void ADC1_SchmittTriggerConfig(ADC1_SchmittTrigg_TypeDef ADC1_SchmittTriggerChannel,
|
||||
FunctionalState NewState);
|
||||
void ADC1_ConversionConfig(ADC1_ConvMode_TypeDef ADC1_ConversionMode,
|
||||
ADC1_Channel_TypeDef ADC1_Channel,
|
||||
ADC1_Align_TypeDef ADC1_Align);
|
||||
void ADC1_ExternalTriggerConfig(ADC1_ExtTrig_TypeDef ADC1_ExtTrigger, FunctionalState NewState);
|
||||
void ADC1_AWDChannelConfig(ADC1_Channel_TypeDef Channel, FunctionalState NewState);
|
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void ADC1_StartConversion(void);
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uint16_t ADC1_GetConversionValue(void);
|
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void ADC1_SetHighThreshold(uint16_t Threshold);
|
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void ADC1_SetLowThreshold(uint16_t Threshold);
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uint16_t ADC1_GetBufferValue(uint8_t Buffer);
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FlagStatus ADC1_GetAWDChannelStatus(ADC1_Channel_TypeDef Channel);
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FlagStatus ADC1_GetFlagStatus(ADC1_Flag_TypeDef Flag);
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void ADC1_ClearFlag(ADC1_Flag_TypeDef Flag);
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ITStatus ADC1_GetITStatus(ADC1_IT_TypeDef ITPendingBit);
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void ADC1_ClearITPendingBit(ADC1_IT_TypeDef ITPendingBit);
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/**
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* @}
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*/
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#endif /* __STM8S_ADC1_H */
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||||
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||||
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/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
|
||||
256
Serial/inc/stm8s_adc2.h
Normal file
256
Serial/inc/stm8s_adc2.h
Normal file
@@ -0,0 +1,256 @@
|
||||
/**
|
||||
******************************************************************************
|
||||
* @file stm8s_adc2.h
|
||||
* @author MCD Application Team
|
||||
* @version V2.3.0
|
||||
* @date 16-June-2017
|
||||
* @brief This file contains all the prototypes/macros for the ADC2 peripheral.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© COPYRIGHT 2014 STMicroelectronics</center></h2>
|
||||
*
|
||||
* Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
|
||||
* You may not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at:
|
||||
*
|
||||
* http://www.st.com/software_license_agreement_liberty_v2
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an "AS IS" BASIS,
|
||||
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
|
||||
/* Define to prevent recursive inclusion -------------------------------------*/
|
||||
#ifndef __STM8S_ADC2_H
|
||||
#define __STM8S_ADC2_H
|
||||
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
#include "stm8s.h"
|
||||
|
||||
/* Exported types ------------------------------------------------------------*/
|
||||
|
||||
/** @addtogroup ADC2_Exported_Types
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @brief ADC2 clock prescaler selection
|
||||
*/
|
||||
|
||||
typedef enum {
|
||||
ADC2_PRESSEL_FCPU_D2 = (uint8_t)0x00, /**< Prescaler selection fADC2 = fcpu/2 */
|
||||
ADC2_PRESSEL_FCPU_D3 = (uint8_t)0x10, /**< Prescaler selection fADC2 = fcpu/3 */
|
||||
ADC2_PRESSEL_FCPU_D4 = (uint8_t)0x20, /**< Prescaler selection fADC2 = fcpu/4 */
|
||||
ADC2_PRESSEL_FCPU_D6 = (uint8_t)0x30, /**< Prescaler selection fADC2 = fcpu/6 */
|
||||
ADC2_PRESSEL_FCPU_D8 = (uint8_t)0x40, /**< Prescaler selection fADC2 = fcpu/8 */
|
||||
ADC2_PRESSEL_FCPU_D10 = (uint8_t)0x50, /**< Prescaler selection fADC2 = fcpu/10 */
|
||||
ADC2_PRESSEL_FCPU_D12 = (uint8_t)0x60, /**< Prescaler selection fADC2 = fcpu/12 */
|
||||
ADC2_PRESSEL_FCPU_D18 = (uint8_t)0x70 /**< Prescaler selection fADC2 = fcpu/18 */
|
||||
} ADC2_PresSel_TypeDef;
|
||||
|
||||
/**
|
||||
* @brief ADC2 External conversion trigger event selection
|
||||
*/
|
||||
typedef enum {
|
||||
ADC2_EXTTRIG_TIM = (uint8_t)0x00, /**< Conversion from Internal TIM TRGO event */
|
||||
ADC2_EXTTRIG_GPIO = (uint8_t)0x01 /**< Conversion from External interrupt on ADC_ETR pin*/
|
||||
} ADC2_ExtTrig_TypeDef;
|
||||
|
||||
/**
|
||||
* @brief ADC2 data alignment
|
||||
*/
|
||||
typedef enum {
|
||||
ADC2_ALIGN_LEFT = (uint8_t)0x00, /**< Data alignment left */
|
||||
ADC2_ALIGN_RIGHT = (uint8_t)0x08 /**< Data alignment right */
|
||||
} ADC2_Align_TypeDef;
|
||||
|
||||
/**
|
||||
* @brief ADC2 schmitt Trigger
|
||||
*/
|
||||
typedef enum {
|
||||
ADC2_SCHMITTTRIG_CHANNEL0 = (uint8_t)0x00, /**< Schmitt trigger disable on AIN0 */
|
||||
ADC2_SCHMITTTRIG_CHANNEL1 = (uint8_t)0x01, /**< Schmitt trigger disable on AIN1 */
|
||||
ADC2_SCHMITTTRIG_CHANNEL2 = (uint8_t)0x02, /**< Schmitt trigger disable on AIN2 */
|
||||
ADC2_SCHMITTTRIG_CHANNEL3 = (uint8_t)0x03, /**< Schmitt trigger disable on AIN3 */
|
||||
ADC2_SCHMITTTRIG_CHANNEL4 = (uint8_t)0x04, /**< Schmitt trigger disable on AIN4 */
|
||||
ADC2_SCHMITTTRIG_CHANNEL5 = (uint8_t)0x05, /**< Schmitt trigger disable on AIN5 */
|
||||
ADC2_SCHMITTTRIG_CHANNEL6 = (uint8_t)0x06, /**< Schmitt trigger disable on AIN6 */
|
||||
ADC2_SCHMITTTRIG_CHANNEL7 = (uint8_t)0x07, /**< Schmitt trigger disable on AIN7 */
|
||||
ADC2_SCHMITTTRIG_CHANNEL8 = (uint8_t)0x08, /**< Schmitt trigger disable on AIN8 */
|
||||
ADC2_SCHMITTTRIG_CHANNEL9 = (uint8_t)0x09, /**< Schmitt trigger disable on AIN9 */
|
||||
ADC2_SCHMITTTRIG_CHANNEL10 = (uint8_t)0x0A, /**< Schmitt trigger disable on AIN10 */
|
||||
ADC2_SCHMITTTRIG_CHANNEL11 = (uint8_t)0x0B, /**< Schmitt trigger disable on AIN11 */
|
||||
ADC2_SCHMITTTRIG_CHANNEL12 = (uint8_t)0x0C, /**< Schmitt trigger disable on AIN12 */
|
||||
ADC2_SCHMITTTRIG_CHANNEL13 = (uint8_t)0x0D, /**< Schmitt trigger disable on AIN13 */
|
||||
ADC2_SCHMITTTRIG_CHANNEL14 = (uint8_t)0x0E, /**< Schmitt trigger disable on AIN14 */
|
||||
ADC2_SCHMITTTRIG_CHANNEL15 = (uint8_t)0x0F, /**< Schmitt trigger disable on AIN15 */
|
||||
ADC2_SCHMITTTRIG_ALL = (uint8_t)0x1F /**< Schmitt trigger disable on all channels */
|
||||
|
||||
} ADC2_SchmittTrigg_TypeDef;
|
||||
|
||||
/**
|
||||
* @brief ADC2 conversion mode selection
|
||||
*/
|
||||
|
||||
typedef enum {
|
||||
ADC2_CONVERSIONMODE_SINGLE = (uint8_t)0x00, /**< Single conversion mode */
|
||||
ADC2_CONVERSIONMODE_CONTINUOUS = (uint8_t)0x01 /**< Continuous conversion mode */
|
||||
} ADC2_ConvMode_TypeDef;
|
||||
|
||||
/**
|
||||
* @brief ADC2 analog channel selection
|
||||
*/
|
||||
|
||||
typedef enum {
|
||||
ADC2_CHANNEL_0 = (uint8_t)0x00, /**< Analog channel 0 */
|
||||
ADC2_CHANNEL_1 = (uint8_t)0x01, /**< Analog channel 1 */
|
||||
ADC2_CHANNEL_2 = (uint8_t)0x02, /**< Analog channel 2 */
|
||||
ADC2_CHANNEL_3 = (uint8_t)0x03, /**< Analog channel 3 */
|
||||
ADC2_CHANNEL_4 = (uint8_t)0x04, /**< Analog channel 4 */
|
||||
ADC2_CHANNEL_5 = (uint8_t)0x05, /**< Analog channel 5 */
|
||||
ADC2_CHANNEL_6 = (uint8_t)0x06, /**< Analog channel 6 */
|
||||
ADC2_CHANNEL_7 = (uint8_t)0x07, /**< Analog channel 7 */
|
||||
ADC2_CHANNEL_8 = (uint8_t)0x08, /**< Analog channel 8 */
|
||||
ADC2_CHANNEL_9 = (uint8_t)0x09, /**< Analog channel 9 */
|
||||
ADC2_CHANNEL_10 = (uint8_t)0x0A, /**< Analog channel 10 */
|
||||
ADC2_CHANNEL_11 = (uint8_t)0x0B, /**< Analog channel 11 */
|
||||
ADC2_CHANNEL_12 = (uint8_t)0x0C, /**< Analog channel 12 */
|
||||
ADC2_CHANNEL_13 = (uint8_t)0x0D, /**< Analog channel 13 */
|
||||
ADC2_CHANNEL_14 = (uint8_t)0x0E, /**< Analog channel 14 */
|
||||
ADC2_CHANNEL_15 = (uint8_t)0x0F /**< Analog channel 15 */
|
||||
} ADC2_Channel_TypeDef;
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/* Exported constants --------------------------------------------------------*/
|
||||
|
||||
/* Exported macros ------------------------------------------------------------*/
|
||||
|
||||
/* Private macros ------------------------------------------------------------*/
|
||||
|
||||
/** @addtogroup ADC2_Private_Macros
|
||||
* @brief Macros used by the assert function to check the different functions parameters.
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @brief Macro used by the assert function to check the different prescaler's values.
|
||||
*/
|
||||
#define IS_ADC2_PRESSEL_OK(PRESCALER) (((PRESCALER) == ADC2_PRESSEL_FCPU_D2) || \
|
||||
((PRESCALER) == ADC2_PRESSEL_FCPU_D3) || \
|
||||
((PRESCALER) == ADC2_PRESSEL_FCPU_D4) || \
|
||||
((PRESCALER) == ADC2_PRESSEL_FCPU_D6) || \
|
||||
((PRESCALER) == ADC2_PRESSEL_FCPU_D8) || \
|
||||
((PRESCALER) == ADC2_PRESSEL_FCPU_D10) || \
|
||||
((PRESCALER) == ADC2_PRESSEL_FCPU_D12) || \
|
||||
((PRESCALER) == ADC2_PRESSEL_FCPU_D18))
|
||||
|
||||
/**
|
||||
* @brief Macro used by the assert function to check the different external trigger values.
|
||||
*/
|
||||
#define IS_ADC2_EXTTRIG_OK(EXTRIG) (((EXTRIG) == ADC2_EXTTRIG_TIM) || \
|
||||
((EXTRIG) == ADC2_EXTTRIG_GPIO))
|
||||
|
||||
/**
|
||||
* @brief Macro used by the assert function to check the different alignment modes.
|
||||
*/
|
||||
#define IS_ADC2_ALIGN_OK(ALIGN) (((ALIGN) == ADC2_ALIGN_LEFT) || \
|
||||
((ALIGN) == ADC2_ALIGN_RIGHT))
|
||||
|
||||
|
||||
/**
|
||||
* @brief Macro used by the assert function to check the different schmitt trigger values.
|
||||
*/
|
||||
#define IS_ADC2_SCHMITTTRIG_OK(SCHMITTTRIG) (((SCHMITTTRIG) == ADC2_SCHMITTTRIG_CHANNEL0) || \
|
||||
((SCHMITTTRIG) == ADC2_SCHMITTTRIG_CHANNEL1) || \
|
||||
((SCHMITTTRIG) == ADC2_SCHMITTTRIG_CHANNEL2) || \
|
||||
((SCHMITTTRIG) == ADC2_SCHMITTTRIG_CHANNEL3) || \
|
||||
((SCHMITTTRIG) == ADC2_SCHMITTTRIG_CHANNEL4) || \
|
||||
((SCHMITTTRIG) == ADC2_SCHMITTTRIG_CHANNEL5) || \
|
||||
((SCHMITTTRIG) == ADC2_SCHMITTTRIG_CHANNEL6) || \
|
||||
((SCHMITTTRIG) == ADC2_SCHMITTTRIG_CHANNEL7) || \
|
||||
((SCHMITTTRIG) == ADC2_SCHMITTTRIG_CHANNEL8) || \
|
||||
((SCHMITTTRIG) == ADC2_SCHMITTTRIG_CHANNEL9) || \
|
||||
((SCHMITTTRIG) == ADC2_SCHMITTTRIG_CHANNEL10) || \
|
||||
((SCHMITTTRIG) == ADC2_SCHMITTTRIG_CHANNEL11) || \
|
||||
((SCHMITTTRIG) == ADC2_SCHMITTTRIG_CHANNEL12) || \
|
||||
((SCHMITTTRIG) == ADC2_SCHMITTTRIG_CHANNEL13) || \
|
||||
((SCHMITTTRIG) == ADC2_SCHMITTTRIG_CHANNEL14) || \
|
||||
((SCHMITTTRIG) == ADC2_SCHMITTTRIG_CHANNEL15) || \
|
||||
((SCHMITTTRIG) == ADC2_SCHMITTTRIG_ALL))
|
||||
|
||||
/**
|
||||
* @brief Macro used by the assert function to check the different conversion modes.
|
||||
*/
|
||||
#define IS_ADC2_CONVERSIONMODE_OK(MODE) (((MODE) == ADC2_CONVERSIONMODE_SINGLE) || \
|
||||
((MODE) == ADC2_CONVERSIONMODE_CONTINUOUS))
|
||||
|
||||
/**
|
||||
* @brief Macro used by the assert function to check the different channels values.
|
||||
*/
|
||||
#define IS_ADC2_CHANNEL_OK(CHANNEL) (((CHANNEL) == ADC2_CHANNEL_0) || \
|
||||
((CHANNEL) == ADC2_CHANNEL_1) || \
|
||||
((CHANNEL) == ADC2_CHANNEL_2) || \
|
||||
((CHANNEL) == ADC2_CHANNEL_3) || \
|
||||
((CHANNEL) == ADC2_CHANNEL_4) || \
|
||||
((CHANNEL) == ADC2_CHANNEL_5) || \
|
||||
((CHANNEL) == ADC2_CHANNEL_6) || \
|
||||
((CHANNEL) == ADC2_CHANNEL_7) || \
|
||||
((CHANNEL) == ADC2_CHANNEL_8) || \
|
||||
((CHANNEL) == ADC2_CHANNEL_9) || \
|
||||
((CHANNEL) == ADC2_CHANNEL_10) || \
|
||||
((CHANNEL) == ADC2_CHANNEL_11) || \
|
||||
((CHANNEL) == ADC2_CHANNEL_12) || \
|
||||
((CHANNEL) == ADC2_CHANNEL_13) || \
|
||||
((CHANNEL) == ADC2_CHANNEL_14) || \
|
||||
((CHANNEL) == ADC2_CHANNEL_15))
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/* Exported functions ------------------------------------------------------- */
|
||||
|
||||
/** @addtogroup ADC2_Exported_Functions
|
||||
* @{
|
||||
*/
|
||||
void ADC2_DeInit(void);
|
||||
void ADC2_Init(ADC2_ConvMode_TypeDef ADC2_ConversionMode,
|
||||
ADC2_Channel_TypeDef ADC2_Channel,
|
||||
ADC2_PresSel_TypeDef ADC2_PrescalerSelection,
|
||||
ADC2_ExtTrig_TypeDef ADC2_ExtTrigger,
|
||||
FunctionalState ADC2_ExtTriggerState,
|
||||
ADC2_Align_TypeDef ADC2_Align,
|
||||
ADC2_SchmittTrigg_TypeDef ADC2_SchmittTriggerChannel,
|
||||
FunctionalState ADC2_SchmittTriggerState);
|
||||
void ADC2_Cmd(FunctionalState NewState);
|
||||
void ADC2_ITConfig(FunctionalState NewState);
|
||||
void ADC2_PrescalerConfig(ADC2_PresSel_TypeDef ADC2_Prescaler);
|
||||
void ADC2_SchmittTriggerConfig(ADC2_SchmittTrigg_TypeDef ADC2_SchmittTriggerChannel,
|
||||
FunctionalState NewState);
|
||||
void ADC2_ConversionConfig(ADC2_ConvMode_TypeDef ADC2_ConversionMode,
|
||||
ADC2_Channel_TypeDef ADC2_Channel,
|
||||
ADC2_Align_TypeDef ADC2_Align);
|
||||
void ADC2_ExternalTriggerConfig(ADC2_ExtTrig_TypeDef ADC2_ExtTrigger, FunctionalState NewState);
|
||||
void ADC2_StartConversion(void);
|
||||
uint16_t ADC2_GetConversionValue(void);
|
||||
FlagStatus ADC2_GetFlagStatus(void);
|
||||
void ADC2_ClearFlag(void);
|
||||
ITStatus ADC2_GetITStatus(void);
|
||||
void ADC2_ClearITPendingBit(void);
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
#endif /* __STM8S_ADC2_H */
|
||||
|
||||
|
||||
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
|
||||
147
Serial/inc/stm8s_awu.h
Normal file
147
Serial/inc/stm8s_awu.h
Normal file
@@ -0,0 +1,147 @@
|
||||
/**
|
||||
******************************************************************************
|
||||
* @file stm8s_awu.h
|
||||
* @author MCD Application Team
|
||||
* @version V2.3.0
|
||||
* @date 16-June-2017
|
||||
* @brief This file contains all functions prototype and macros for the AWU peripheral.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© COPYRIGHT 2014 STMicroelectronics</center></h2>
|
||||
*
|
||||
* Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
|
||||
* You may not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at:
|
||||
*
|
||||
* http://www.st.com/software_license_agreement_liberty_v2
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an "AS IS" BASIS,
|
||||
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
/* Define to prevent recursive inclusion -------------------------------------*/
|
||||
#ifndef __STM8S_AWU_H
|
||||
#define __STM8S_AWU_H
|
||||
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
#include "stm8s.h"
|
||||
|
||||
/* Exported types ------------------------------------------------------------*/
|
||||
|
||||
/** @addtogroup AWU_Exported_Types
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @brief AWU TimeBase selection
|
||||
*/
|
||||
|
||||
typedef enum
|
||||
{
|
||||
AWU_TIMEBASE_NO_IT = (uint8_t)0, /*!< No AWU interrupt selected */
|
||||
AWU_TIMEBASE_250US = (uint8_t)1, /*!< AWU Timebase equals 0.25 ms */
|
||||
AWU_TIMEBASE_500US = (uint8_t)2, /*!< AWU Timebase equals 0.5 ms */
|
||||
AWU_TIMEBASE_1MS = (uint8_t)3, /*!< AWU Timebase equals 1 ms */
|
||||
AWU_TIMEBASE_2MS = (uint8_t)4, /*!< AWU Timebase equals 2 ms */
|
||||
AWU_TIMEBASE_4MS = (uint8_t)5, /*!< AWU Timebase equals 4 ms */
|
||||
AWU_TIMEBASE_8MS = (uint8_t)6, /*!< AWU Timebase equals 8 ms */
|
||||
AWU_TIMEBASE_16MS = (uint8_t)7, /*!< AWU Timebase equals 16 ms */
|
||||
AWU_TIMEBASE_32MS = (uint8_t)8, /*!< AWU Timebase equals 32 ms */
|
||||
AWU_TIMEBASE_64MS = (uint8_t)9, /*!< AWU Timebase equals 64 ms */
|
||||
AWU_TIMEBASE_128MS = (uint8_t)10, /*!< AWU Timebase equals 128 ms */
|
||||
AWU_TIMEBASE_256MS = (uint8_t)11, /*!< AWU Timebase equals 256 ms */
|
||||
AWU_TIMEBASE_512MS = (uint8_t)12, /*!< AWU Timebase equals 512 ms */
|
||||
AWU_TIMEBASE_1S = (uint8_t)13, /*!< AWU Timebase equals 1 s */
|
||||
AWU_TIMEBASE_2S = (uint8_t)14, /*!< AWU Timebase equals 2 s */
|
||||
AWU_TIMEBASE_12S = (uint8_t)15, /*!< AWU Timebase equals 12 s */
|
||||
AWU_TIMEBASE_30S = (uint8_t)16 /*!< AWU Timebase equals 30 s */
|
||||
} AWU_Timebase_TypeDef;
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/* Exported constants --------------------------------------------------------*/
|
||||
|
||||
/** @addtogroup AWU_Exported_Constants
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define LSI_FREQUENCY_MIN ((uint32_t)110000) /*!< LSI minimum value in Hertz */
|
||||
#define LSI_FREQUENCY_MAX ((uint32_t)150000) /*!< LSI maximum value in Hertz */
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/* Exported macros ------------------------------------------------------------*/
|
||||
|
||||
/* Private macros ------------------------------------------------------------*/
|
||||
|
||||
/** @addtogroup AWU_Private_Macros
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @brief Macro used by the assert function to check the different functions parameters.
|
||||
*/
|
||||
|
||||
/**
|
||||
* @brief Macro used by the assert function to check the AWU timebases
|
||||
*/
|
||||
#define IS_AWU_TIMEBASE_OK(TB) \
|
||||
(((TB) == AWU_TIMEBASE_NO_IT) || \
|
||||
((TB) == AWU_TIMEBASE_250US) || \
|
||||
((TB) == AWU_TIMEBASE_500US) || \
|
||||
((TB) == AWU_TIMEBASE_1MS) || \
|
||||
((TB) == AWU_TIMEBASE_2MS) || \
|
||||
((TB) == AWU_TIMEBASE_4MS) || \
|
||||
((TB) == AWU_TIMEBASE_8MS) || \
|
||||
((TB) == AWU_TIMEBASE_16MS) || \
|
||||
((TB) == AWU_TIMEBASE_32MS) || \
|
||||
((TB) == AWU_TIMEBASE_64MS) || \
|
||||
((TB) == AWU_TIMEBASE_128MS) || \
|
||||
((TB) == AWU_TIMEBASE_256MS) || \
|
||||
((TB) == AWU_TIMEBASE_512MS) || \
|
||||
((TB) == AWU_TIMEBASE_1S) || \
|
||||
((TB) == AWU_TIMEBASE_2S) || \
|
||||
((TB) == AWU_TIMEBASE_12S) || \
|
||||
((TB) == AWU_TIMEBASE_30S))
|
||||
|
||||
/**
|
||||
* @brief Macro used by the assert function to check the LSI frequency (in Hz)
|
||||
*/
|
||||
#define IS_LSI_FREQUENCY_OK(FREQ) \
|
||||
(((FREQ) >= LSI_FREQUENCY_MIN) && \
|
||||
((FREQ) <= LSI_FREQUENCY_MAX))
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/* Exported functions ------------------------------------------------------- */
|
||||
|
||||
/** @addtogroup AWU_Exported_Functions
|
||||
* @{
|
||||
*/
|
||||
void AWU_DeInit(void);
|
||||
void AWU_Init(AWU_Timebase_TypeDef AWU_TimeBase);
|
||||
void AWU_Cmd(FunctionalState NewState);
|
||||
void AWU_LSICalibrationConfig(uint32_t LSIFreqHz);
|
||||
void AWU_IdleModeEnable(void);
|
||||
FlagStatus AWU_GetFlagStatus(void);
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
#endif /* __STM8S_AWU_H */
|
||||
|
||||
|
||||
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
|
||||
119
Serial/inc/stm8s_beep.h
Normal file
119
Serial/inc/stm8s_beep.h
Normal file
@@ -0,0 +1,119 @@
|
||||
/**
|
||||
******************************************************************************
|
||||
* @file stm8s_beep.h
|
||||
* @author MCD Application Team
|
||||
* @version V2.3.0
|
||||
* @date 16-June-2017
|
||||
* @brief This file contains all functions prototype and macros for the BEEP peripheral.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© COPYRIGHT 2014 STMicroelectronics</center></h2>
|
||||
*
|
||||
* Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
|
||||
* You may not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at:
|
||||
*
|
||||
* http://www.st.com/software_license_agreement_liberty_v2
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an "AS IS" BASIS,
|
||||
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
|
||||
/* Define to prevent recursive inclusion -------------------------------------*/
|
||||
#ifndef __STM8S_BEEP_H
|
||||
#define __STM8S_BEEP_H
|
||||
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
#include "stm8s.h"
|
||||
|
||||
/* Exported types ------------------------------------------------------------*/
|
||||
|
||||
/** @addtogroup BEEP_Exported_Types
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @brief BEEP Frequency selection
|
||||
*/
|
||||
typedef enum {
|
||||
BEEP_FREQUENCY_1KHZ = (uint8_t)0x00, /*!< Beep signal output frequency equals to 1 KHz */
|
||||
BEEP_FREQUENCY_2KHZ = (uint8_t)0x40, /*!< Beep signal output frequency equals to 2 KHz */
|
||||
BEEP_FREQUENCY_4KHZ = (uint8_t)0x80 /*!< Beep signal output frequency equals to 4 KHz */
|
||||
} BEEP_Frequency_TypeDef;
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/* Exported constants --------------------------------------------------------*/
|
||||
|
||||
/** @addtogroup BEEP_Exported_Constants
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define BEEP_CALIBRATION_DEFAULT ((uint8_t)0x0B) /*!< Default value when calibration is not done */
|
||||
|
||||
#define LSI_FREQUENCY_MIN ((uint32_t)110000) /*!< LSI minimum value in Hertz */
|
||||
#define LSI_FREQUENCY_MAX ((uint32_t)150000) /*!< LSI maximum value in Hertz */
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/* Exported macros -----------------------------------------------------------*/
|
||||
/* Private macros ------------------------------------------------------------*/
|
||||
|
||||
/** @addtogroup BEEP_Private_Macros
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @brief Macro used by the assert function to check the different functions parameters.
|
||||
*/
|
||||
|
||||
/**
|
||||
* @brief Macro used by the assert function to check the BEEP frequencies.
|
||||
*/
|
||||
#define IS_BEEP_FREQUENCY_OK(FREQ) \
|
||||
(((FREQ) == BEEP_FREQUENCY_1KHZ) || \
|
||||
((FREQ) == BEEP_FREQUENCY_2KHZ) || \
|
||||
((FREQ) == BEEP_FREQUENCY_4KHZ))
|
||||
|
||||
/**
|
||||
* @brief Macro used by the assert function to check the LSI frequency (in Hz).
|
||||
*/
|
||||
#define IS_LSI_FREQUENCY_OK(FREQ) \
|
||||
(((FREQ) >= LSI_FREQUENCY_MIN) && \
|
||||
((FREQ) <= LSI_FREQUENCY_MAX))
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/* Exported functions ------------------------------------------------------- */
|
||||
|
||||
/** @addtogroup BEEP_Exported_Functions
|
||||
* @{
|
||||
*/
|
||||
|
||||
void BEEP_DeInit(void);
|
||||
void BEEP_Init(BEEP_Frequency_TypeDef BEEP_Frequency);
|
||||
void BEEP_Cmd(FunctionalState NewState);
|
||||
void BEEP_LSICalibrationConfig(uint32_t LSIFreqHz);
|
||||
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
#endif /* __STM8S_BEEP_H */
|
||||
|
||||
|
||||
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
|
||||
521
Serial/inc/stm8s_can.h
Normal file
521
Serial/inc/stm8s_can.h
Normal file
@@ -0,0 +1,521 @@
|
||||
/**
|
||||
******************************************************************************
|
||||
* @file stm8s_can.h
|
||||
* @author MCD Application Team
|
||||
* @version V2.3.0
|
||||
* @date 16-June-2017
|
||||
* @brief This file contains all the functions for the CAN peripheral.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© COPYRIGHT 2014 STMicroelectronics</center></h2>
|
||||
*
|
||||
* Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
|
||||
* You may not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at:
|
||||
*
|
||||
* http://www.st.com/software_license_agreement_liberty_v2
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an "AS IS" BASIS,
|
||||
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
/* Define to prevent recursive inclusion -------------------------------------*/
|
||||
#ifndef __STM8S_CAN_H
|
||||
#define __STM8S_CAN_H
|
||||
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
#include "stm8s.h"
|
||||
|
||||
/* Exported constants --------------------------------------------------------*/
|
||||
#define CAN_STDID_SIZE ((uint16_t)0x07FF)
|
||||
#define CAN_EXTID_SIZE ((uint32_t)0x1FFFFFFF)
|
||||
#define CAN_DLC_MAX ((uint8_t)0x08)
|
||||
|
||||
|
||||
/** @addtogroup CAN_Exported_Types
|
||||
* @{
|
||||
*/
|
||||
|
||||
|
||||
/**
|
||||
* @brief CAN Page Mapping
|
||||
*/
|
||||
typedef enum
|
||||
{
|
||||
CAN_Page_TxMailBox0 = ((uint8_t) 0), /*!< CAN TX mailbox 0 reg page */
|
||||
CAN_Page_TxMailBox1 = ((uint8_t) 1), /*!< CAN TX mailbox 1 reg page */
|
||||
CAN_Page_TxMailBox2 = ((uint8_t) 5), /*!< CAN TX mailbox 2 reg page */
|
||||
CAN_Page_Filter01 = ((uint8_t) 2), /*!< CAN Filters 0 & 1 reg page*/
|
||||
CAN_Page_Filter23 = ((uint8_t) 3), /*!< CAN Filters 2 & 3 reg page*/
|
||||
CAN_Page_Filter45 = ((uint8_t) 4), /*!< CAN Filters 4 & 5 reg page*/
|
||||
CAN_Page_Config = ((uint8_t) 6), /*!< CAN Configuration control/status reg page*/
|
||||
CAN_Page_RxFifo = ((uint8_t) 7) /*!< CAN RX FIFO registers page */
|
||||
}CAN_Page_TypeDef;
|
||||
|
||||
|
||||
|
||||
/**
|
||||
* @brief CAN sleep constants
|
||||
*/
|
||||
typedef enum {
|
||||
CAN_InitStatus_Failed =0, /*!< CAN initialization failed */
|
||||
CAN_InitStatus_Success =! CAN_InitStatus_Failed /*!< CAN initialization OK*/
|
||||
} CAN_InitStatus_TypeDef;
|
||||
|
||||
|
||||
/**
|
||||
* @brief CAN operating mode */
|
||||
typedef enum
|
||||
{
|
||||
CAN_OperatingMode_Initialization =((uint8_t)0x00), /*!< Initialization mode */
|
||||
CAN_OperatingMode_Normal =((uint8_t)0x01), /*!< Normal mode */
|
||||
CAN_OperatingMode_Sleep =((uint8_t)0x02) /*!< sleep mode */
|
||||
}CAN_OperatingMode_TypeDef;
|
||||
|
||||
/**
|
||||
* @brief CAN operating mode status */
|
||||
typedef enum
|
||||
{
|
||||
CAN_ModeStatus_Failed = ((uint8_t)0x00), /*!< CAN entering the specific mode failed */
|
||||
CAN_ModeStatus_Success =! CAN_ModeStatus_Failed /*!< CAN entering the specific mode Succeed */
|
||||
}CAN_ModeStatus_TypeDef;
|
||||
|
||||
/**
|
||||
* @brief CAN Time Triggered Communication mode
|
||||
*/
|
||||
typedef enum
|
||||
{
|
||||
CAN_MasterCtrl_AllDisabled =((uint8_t)0x00), /*!< CAN ALL Master Control Option are DISABLED */
|
||||
CAN_MasterCtrl_AllEnabled =((uint8_t)0xFC), /*!< CAN ALL Master Control Option are DISABLED */
|
||||
CAN_MasterCtrl_TimeTriggerCOMMode =((uint8_t)0x80), /*!< CAN Time Triggered Communication mode ENABLED */
|
||||
CAN_MasterCtrl_AutoBusOffManagement =((uint8_t)0x40), /*!< CAN Auto Bus Off Management ENABLED */
|
||||
CAN_MasterCtrl_AutoWakeUpMode =((uint8_t)0x20), /*!< CAN Automatic WakeUp Mode ENABLED , sleep mode is left automatically by hardware */
|
||||
CAN_MasterCtrl_NoAutoReTx =((uint8_t)0x10), /*!< CAN Non Automatic Retransmission ENABLED, MSG will be transmitted only once */
|
||||
CAN_MasterCtrl_RxFifoLockedMode =((uint8_t)0x08), /*!< CAN Receive FIFO Locked against overrun ENABLED */
|
||||
CAN_MasterCtrl_TxFifoPriority =((uint8_t)0x04) /*!< CAN Transmit FIFO Priority driven by the request order (not by the identifier of the MSG) */
|
||||
}CAN_MasterCtrl_TypeDef;
|
||||
|
||||
/**
|
||||
* @brief CAN mode options */
|
||||
typedef enum
|
||||
{
|
||||
CAN_Mode_Normal =((uint8_t)0x00), /*!< normal mode */
|
||||
CAN_Mode_LoopBack =((uint8_t)0x01), /*!< loopback mode */
|
||||
CAN_Mode_Silent =((uint8_t)0x02), /*!< silent mode */
|
||||
CAN_Mode_Silent_LoopBack =((uint8_t)0x03) /*!< loopback combined with silent mode */
|
||||
}CAN_Mode_TypeDef;
|
||||
|
||||
/**
|
||||
* @brief CAN synchronisation jump width (SJW)*/
|
||||
typedef enum
|
||||
{
|
||||
CAN_SynJumpWidth_1TimeQuantum =((uint8_t)0x00), /*!< 1 time quantum */
|
||||
CAN_SynJumpWidth_2TimeQuantum =((uint8_t)0x40), /*!< 2 time quantum */
|
||||
CAN_SynJumpWidth_3TimeQuantum =((uint8_t)0x80), /*!< 3 time quantum */
|
||||
CAN_SynJumpWidth_4TimeQuantum =((uint8_t)0xC0) /*!< 4 time quantum */
|
||||
}CAN_SynJumpWidth_TypeDef;
|
||||
|
||||
/**
|
||||
* @brief time quantum in bit segment 1 */
|
||||
typedef enum
|
||||
{
|
||||
CAN_BitSeg1_1TimeQuantum =((uint8_t)0x00), /*!< 1 time quantum */
|
||||
CAN_BitSeg1_2TimeQuantum =((uint8_t)0x01), /*!< 2 time quantum */
|
||||
CAN_BitSeg1_3TimeQuantum =((uint8_t)0x02), /*!< 3 time quantum */
|
||||
CAN_BitSeg1_4TimeQuantum =((uint8_t)0x03) , /*!< 4 time quantum */
|
||||
CAN_BitSeg1_5TimeQuantum =((uint8_t)0x04) , /*!< 5 time quantum */
|
||||
CAN_BitSeg1_6TimeQuantum =((uint8_t)0x05) , /*!< 6 time quantum */
|
||||
CAN_BitSeg1_7TimeQuantum =((uint8_t)0x06) , /*!< 7 time quantum */
|
||||
CAN_BitSeg1_8TimeQuantum =((uint8_t)0x07), /*!< 8 time quantum */
|
||||
CAN_BitSeg1_9TimeQuantum =((uint8_t)0x08), /*!< 9 time quantum */
|
||||
CAN_BitSeg1_10TimeQuantum =((uint8_t)0x09), /*!< 10 time quantum */
|
||||
CAN_BitSeg1_11TimeQuantum =((uint8_t)0x0A), /*!< 11 time quantum */
|
||||
CAN_BitSeg1_12TimeQuantum =((uint8_t)0x0B), /*!< 12 time quantum */
|
||||
CAN_BitSeg1_13TimeQuantum =((uint8_t)0x0C), /*!< 13 time quantum */
|
||||
CAN_BitSeg1_14TimeQuantum =((uint8_t)0x0D), /*!< 14 time quantum */
|
||||
CAN_BitSeg1_15TimeQuantum =((uint8_t)0x0E), /*!< 15 time quantum */
|
||||
CAN_BitSeg1_16TimeQuantum =((uint8_t)0x0F) /*!< 16 time quantum */
|
||||
}CAN_BitSeg1_TypeDef;
|
||||
|
||||
/**
|
||||
* @brief time quantum in bit segment 2 */
|
||||
typedef enum
|
||||
{
|
||||
CAN_BitSeg2_1TimeQuantum = ((uint8_t)0x00), /*!< 1 time quantum */
|
||||
CAN_BitSeg2_2TimeQuantum = ((uint8_t)0x10), /*!< 2 time quantum */
|
||||
CAN_BitSeg2_3TimeQuantum = ((uint8_t)0x20), /*!< 3 time quantum */
|
||||
CAN_BitSeg2_4TimeQuantum = ((uint8_t)0x30), /*!< 4 time quantum */
|
||||
CAN_BitSeg2_5TimeQuantum = ((uint8_t)0x40), /*!< 5 time quantum */
|
||||
CAN_BitSeg2_6TimeQuantum = ((uint8_t)0x50), /*!< 6 time quantum */
|
||||
CAN_BitSeg2_7TimeQuantum = ((uint8_t)0x60), /*!< 7 time quantum */
|
||||
CAN_BitSeg2_8TimeQuantum = ((uint8_t)0x70) /*!< 8 time quantum */
|
||||
}CAN_BitSeg2_TypeDef;
|
||||
|
||||
|
||||
/**
|
||||
* @brief CAN filter number */
|
||||
typedef enum
|
||||
{
|
||||
CAN_FilterNumber_0 = ((uint8_t)0x00), /*!< Filter number 0 */
|
||||
CAN_FilterNumber_1 = ((uint8_t)0x01), /*!< Filter number 1 */
|
||||
CAN_FilterNumber_2 = ((uint8_t)0x02), /*!< Filter number 2 */
|
||||
CAN_FilterNumber_3 = ((uint8_t)0x03), /*!< Filter number 3 */
|
||||
CAN_FilterNumber_4 = ((uint8_t)0x04), /*!< Filter number 4 */
|
||||
CAN_FilterNumber_5 = ((uint8_t)0x05) /*!< Filter number 5 */
|
||||
}CAN_FilterNumber_TypeDef;
|
||||
|
||||
/**
|
||||
* @brief CAN filter mode */
|
||||
typedef enum
|
||||
{
|
||||
CAN_FilterMode_IdMask = ((uint8_t)0x00), /*!< id/mask mode */
|
||||
CAN_FilterMode_IdMask_IdList = ((uint8_t)0x10), /*!< Id/Mask mode First and IdList mode second */
|
||||
CAN_FilterMode_IdList_IdMask = ((uint8_t)0x11), /*!< IdList mode First and IdMask mode second */
|
||||
CAN_FilterMode_IdList = ((uint8_t)0x01) /*!< identifier list mode */
|
||||
}CAN_FilterMode_TypeDef;
|
||||
|
||||
/**
|
||||
* @brief CAN filter scale */
|
||||
typedef enum
|
||||
{
|
||||
CAN_FilterScale_8Bit =((uint8_t)0x00), /*!< 8-bit filter scale */
|
||||
CAN_FilterScale_16_8Bit =((uint8_t)0x02), /*!< 16/8-bit filter scale */
|
||||
CAN_FilterScale_16Bit =((uint8_t)0x04), /*!< 16-bit filter scale */
|
||||
CAN_FilterScale_32Bit =((uint8_t)0x06) /*!< 32-bit filter scale */
|
||||
}CAN_FilterScale_TypeDef;
|
||||
|
||||
|
||||
/**
|
||||
* @brief CAN Tx mailboxes*/
|
||||
typedef enum
|
||||
{
|
||||
CAN_TransmitMailBox_0 = ((uint8_t) 0x00), /*!< CAN TX mailbox 0 reg page */
|
||||
CAN_TransmitMailBox_1 = ((uint8_t) 0x01), /*!< CAN TX mailbox 1 reg page */
|
||||
CAN_TransmitMailBox_2 = ((uint8_t) 0x05) /*!< CAN TX mailbox 2 reg page */
|
||||
}CAN_TransmitMailBox_TypeDef;
|
||||
|
||||
/**
|
||||
* @brief CAN Pending Messages number*/
|
||||
typedef enum
|
||||
{
|
||||
CAN_NbrPendingMessage_0 = ((uint8_t)0x00), /*!< No Msg Pending */
|
||||
CAN_NbrPendingMessage_1 = ((uint8_t)0x01), /*!< 1 Msg Pending */
|
||||
CAN_NbrPendingMessage_2 = ((uint8_t)0x02), /*!< 2 Msg Pending */
|
||||
CAN_NbrPendingMessage_3 = ((uint8_t)0x03) /*!< 3 Msg Pending */
|
||||
}CAN_NbrPendingMessage_TypeDef;
|
||||
|
||||
/**
|
||||
* @brief CAN identifier type */
|
||||
typedef enum
|
||||
{
|
||||
CAN_Id_Standard =((uint8_t)0x00), /*!< Standard Id */
|
||||
CAN_Id_Extended =((uint8_t)0x40) /*!< Extended Id */
|
||||
}CAN_Id_TypeDef;
|
||||
|
||||
/**
|
||||
* @brief CAN remote transmission request */
|
||||
typedef enum
|
||||
{
|
||||
CAN_RTR_Data = ((uint8_t)0x00), /*!< Data frame */
|
||||
CAN_RTR_Remote = ((uint8_t)0x20) /*!< Remote frame */
|
||||
}CAN_RTR_TypeDef;
|
||||
|
||||
/**
|
||||
* @brief CAN transmit Status */
|
||||
typedef enum
|
||||
{
|
||||
CAN_TxStatus_Failed =((uint8_t)0xF0), /*!< CAN transmission failed */
|
||||
CAN_TxStatus_Ok =((uint8_t)0xF1), /*!< CAN transmission succeeded */
|
||||
CAN_TxStatus_Pending =((uint8_t)0xF2), /*!< CAN transmission pending */
|
||||
CAN_TxStatus_NoMailBox =((uint8_t)0xF4), /*!< CAN cell did not provide an empty mailbox */
|
||||
CAN_TxStatus_MailBoxEmpty =((uint8_t)0xF5), /*!< CAN Tx mailbox is Empty */
|
||||
CAN_TxStatus_MailBox0Ok =((uint8_t)0x00), /*!< CAN transmission succeeded by mail box 1*/
|
||||
CAN_TxStatus_MailBox1Ok =((uint8_t)0x01), /*!< CAN transmission succeeded by mail box 2*/
|
||||
CAN_TxStatus_MailBox2Ok =((uint8_t)0x05) /*!< CAN transmission succeeded by mail box 3*/
|
||||
}CAN_TxStatus_TypeDef;
|
||||
|
||||
/**
|
||||
* @brief CAN sleep Status */
|
||||
typedef enum
|
||||
{
|
||||
CAN_Sleep_Failed = ((uint8_t)0x00), /*!< CAN did not enter the sleep mode */
|
||||
CAN_Sleep_Ok = ((uint8_t)0x01) /*!< CAN entered the sleep mode */
|
||||
}CAN_Sleep_TypeDef;
|
||||
/**
|
||||
* @brief CAN wake up status */
|
||||
typedef enum
|
||||
{
|
||||
CAN_WakeUp_Failed = ((uint8_t)0x00), /*!< CAN did not leave the sleep mode */
|
||||
CAN_WakeUp_Ok = ((uint8_t)0x01) /*!< CAN leaved the sleep mode */
|
||||
}CAN_WakeUp_TypeDef;
|
||||
|
||||
/**
|
||||
* @brief CAN flags */
|
||||
typedef enum
|
||||
{
|
||||
/* if the flag is 0x3XXX, it means that it can be got (CAN_GetFlagStatus) and Cleared (CAN_ClearFlag) */
|
||||
/* if the flag is 0x1XXX, it means that it can only be got (CAN_GetFlagStatus) */
|
||||
/*Transmit Flags*/
|
||||
CAN_FLAG_RQCP0 =((uint16_t)0x3401), /*!< Request MailBox0 Flag */
|
||||
CAN_FLAG_RQCP1 =((uint16_t)0x3402), /*!< Request MailBox1 Flag */
|
||||
CAN_FLAG_RQCP2 =((uint16_t)0x3404), /*!< Request MailBox2 Flag */
|
||||
/*Receive Flags*/
|
||||
CAN_FLAG_FMP =((uint16_t)0x1203), /*!< FIFO Message Pending Flag */
|
||||
CAN_FLAG_FF =((uint16_t)0x3208), /*!< FIFO Full Flag */
|
||||
CAN_FLAG_FOV =((uint16_t)0x3210), /*!< FIFO Overrun Flag */
|
||||
/*Wake up Flag*/
|
||||
CAN_FLAG_WKU =((uint16_t)0x3108), /*!< wake up Flag */
|
||||
/*Error Flags*/
|
||||
CAN_FLAG_EWG =((uint16_t)0x1001), /*!< Error Warning Flag */
|
||||
CAN_FLAG_EPV =((uint16_t)0x1002), /*!< Error Passive Flag */
|
||||
CAN_FLAG_BOF =((uint16_t)0x1004), /*!< Bus-Off Flag */
|
||||
CAN_FLAG_LEC =((uint16_t)0x3070) /*!< Last error code Flag */
|
||||
}CAN_FLAG_TypeDef;
|
||||
|
||||
/**
|
||||
* @brief CAN interrupts */
|
||||
typedef enum
|
||||
{
|
||||
/*Transmit Interruption*/
|
||||
CAN_IT_TME =((uint16_t)0x0001), /*!< Transmit mailbox empty interrupt */
|
||||
/*Receive Interruptions*/
|
||||
CAN_IT_FMP =((uint16_t)0x0002), /*!< FIFO message pending interrupt */
|
||||
CAN_IT_FF =((uint16_t)0x0004), /*!< FIFO full interrupt */
|
||||
CAN_IT_FOV =((uint16_t)0x0008), /*!< FIFO overrun interrupt */
|
||||
/*Wake Up Interruption*/
|
||||
CAN_IT_WKU =((uint16_t)0x0080), /*!< Wake-up interrupt */
|
||||
/*Error Interruptions*/
|
||||
CAN_IT_ERR =((uint16_t)0x4000), /*!< Genaral Error interrupt */
|
||||
CAN_IT_EWG =((uint16_t)0x0100), /*!< Error warning interrupt */
|
||||
CAN_IT_EPV =((uint16_t)0x0200), /*!< Error passive interrupt */
|
||||
CAN_IT_BOF =((uint16_t)0x0400), /*!< Bus-off interrupt */
|
||||
CAN_IT_LEC =((uint16_t)0x0800) /*!< Last error code interrupt */
|
||||
} CAN_IT_TypeDef;
|
||||
|
||||
/**
|
||||
* @brief CAN ST7 Compatibility*/
|
||||
typedef enum
|
||||
{
|
||||
CAN_ST7Compatibility_Enable = ((uint8_t)0x00), /*!< CAN is compatible with ST7 beCAN (only 2 mailboxes are available)*/
|
||||
CAN_ST7Compatibility_Disable = ((uint8_t)0x10) /*!< CAN is not compatible with ST7 beCAN ( 3 mailboxes are available)*/
|
||||
}CAN_ST7Compatibility_TypeDef;
|
||||
|
||||
/**
|
||||
* @brief CAN Error Code description */
|
||||
typedef enum
|
||||
{
|
||||
CAN_ErrorCode_NoErr = ((uint8_t)0x00), /*!< No Error */
|
||||
CAN_ErrorCode_StuffErr = ((uint8_t)0x10), /*!< Stuff Error */
|
||||
CAN_ErrorCode_FormErr = ((uint8_t)0x20), /*!< Form Error */
|
||||
CAN_ErrorCode_ACKErr = ((uint8_t)0x30), /*!< Acknowledgment Error */
|
||||
CAN_ErrorCode_BitRecessiveErr = ((uint8_t)0x40), /*!< Bit Recessive Error */
|
||||
CAN_ErrorCode_BitDominantErr = ((uint8_t)0x50), /*!< Bit Dominant Error */
|
||||
CAN_ErrorCode_CRCErr = ((uint8_t)0x60), /*!< CRC Error */
|
||||
CAN_ErrorCode_SoftwareSetErr = ((uint8_t)0x70) /*!< Software Set Error */
|
||||
}CAN_ErrorCode_TypeDef;
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
/* Private macros ------------------------------------------------------------*/
|
||||
/** @addtogroup CAN_Private_Macros
|
||||
* @{
|
||||
*/
|
||||
/**
|
||||
* @brief Macro used by the assert function in order to check the CAN ST7 Compatibility parameters.
|
||||
*/
|
||||
#define IS_CAN_ST7_COMPATIBILITY_OK(STATE) (((STATE) == CAN_ST7Compatibility_Enable) || ((STATE) == CAN_ST7Compatibility_Disable))
|
||||
/**
|
||||
* @brief Macro used by the assert function in order to check CAN operating mode.
|
||||
*/
|
||||
#define IS_CAN_OPERATINGMODE_OK(MODE) (((MODE) == CAN_OperatingMode_Initialization) ||\
|
||||
((MODE) == CAN_OperatingMode_Normal)|| \
|
||||
((MODE) == CAN_OperatingMode_Sleep))
|
||||
/**
|
||||
* @brief Macro used by the assert function in order to check CAN Time Triggered Communication mode.
|
||||
*/
|
||||
#define IS_CAN_MASTERCTRL_OK(MODE) (((MODE) == CAN_MasterCtrl_AllDisabled) || \
|
||||
(((MODE) <= CAN_MasterCtrl_AllEnabled) && ((MODE) >= CAN_MasterCtrl_TxFifoPriority)))
|
||||
/**
|
||||
* @brief Macro used by the assert function in order to check CAN mode options .
|
||||
*/
|
||||
#define IS_CAN_MODE_OK(MODE) (((MODE) == CAN_Mode_Normal) || ((MODE) == CAN_Mode_LoopBack)|| \
|
||||
((MODE) == CAN_Mode_Silent) || ((MODE) == CAN_Mode_Silent_LoopBack))
|
||||
/**
|
||||
* @brief Macro used by the assert function in order to check the CAN synchronisation jump width (SJW).
|
||||
*/
|
||||
#define IS_CAN_SYNJUMPWIDTH_OK(SJW) (((SJW) == CAN_SynJumpWidth_1TimeQuantum) || ((SJW) == CAN_SynJumpWidth_2TimeQuantum)|| \
|
||||
((SJW) == CAN_SynJumpWidth_3TimeQuantum) || ((SJW) == CAN_SynJumpWidth_4TimeQuantum))
|
||||
/**
|
||||
* @brief Macro used by the assert function in order to check time quantum in bit segment 1 .
|
||||
*/
|
||||
#define IS_CAN_BITSEG1_OK(BS1) ((BS1) <= CAN_BitSeg1_16TimeQuantum)
|
||||
/**
|
||||
* @brief Macro used by the assert function in order to check time quantum in bit segment 2.
|
||||
*/
|
||||
#define IS_CAN_BITSEG2_OK(BS2) ((((BS2) >= CAN_BitSeg2_2TimeQuantum) && ((BS2) <= CAN_BitSeg2_8TimeQuantum))|| ((BS2) == CAN_BitSeg2_1TimeQuantum))
|
||||
/**
|
||||
* @brief Macro used by the assert function in order to check CAN clock prescaler.
|
||||
*/
|
||||
#define IS_CAN_PRESCALER_OK(PRESCALER) (((PRESCALER) >= 1) && ((PRESCALER) <= 64))
|
||||
/**
|
||||
* @brief Macro used by the assert function in order to check CAN filter number.
|
||||
*/
|
||||
#define IS_CAN_FILTER_NUMBER_OK(NUMBER) (((NUMBER) == CAN_FilterNumber_0) || \
|
||||
((NUMBER) == CAN_FilterNumber_1) || \
|
||||
((NUMBER) == CAN_FilterNumber_2) || \
|
||||
((NUMBER) == CAN_FilterNumber_3) || \
|
||||
((NUMBER) == CAN_FilterNumber_4) || \
|
||||
((NUMBER) == CAN_FilterNumber_5))
|
||||
/**
|
||||
* @brief Macro used by the assert function in order to check CAN filter mode.
|
||||
*/
|
||||
#define IS_CAN_FILTER_MODE_OK(MODE) (((MODE) == CAN_FilterMode_IdMask) || \
|
||||
((MODE) == CAN_FilterMode_IdMask_IdList) || \
|
||||
((MODE) == CAN_FilterMode_IdList_IdMask) || \
|
||||
((MODE) == CAN_FilterMode_IdList))
|
||||
/**
|
||||
* @brief Macro used by the assert function in order to check CAN filter scale.
|
||||
*/
|
||||
#define IS_CAN_FILTER_SCALE_OK(SCALE) (((SCALE) == CAN_FilterScale_8Bit)|| \
|
||||
((SCALE) == CAN_FilterScale_16_8Bit) ||\
|
||||
((SCALE) == CAN_FilterScale_16Bit )||\
|
||||
((SCALE) == CAN_FilterScale_32Bit))
|
||||
/**
|
||||
* @brief Macro used by the assert function in order to check CAN Tx mailboxes.
|
||||
*/
|
||||
#define IS_CAN_TRANSMITMAILBOX_OK(TRANSMITMAILBOX) (((TRANSMITMAILBOX) == CAN_TransmitMailBox_0) || \
|
||||
((TRANSMITMAILBOX) == CAN_TransmitMailBox_1) || \
|
||||
((TRANSMITMAILBOX) == CAN_TransmitMailBox_2))
|
||||
/**
|
||||
* @brief Macro used by the assert function in order to check the Standard ID to be sent.
|
||||
*/
|
||||
#define IS_CAN_STDID_OK(STDID) ((STDID) <= ((uint16_t)CAN_STDID_SIZE))
|
||||
/**
|
||||
* @brief Macro used by the assert function in order to check the Extended ID to be sent.
|
||||
*/
|
||||
#define IS_CAN_EXTID_OK(EXTID) ((EXTID) <= ((uint32_t)CAN_EXTID_SIZE))
|
||||
/**
|
||||
* @brief Macro used by the assert function in order to check the DLC to be sent.
|
||||
*/
|
||||
#define IS_CAN_DLC_OK(DLC) ((DLC) <= CAN_DLC_MAX)
|
||||
/**
|
||||
* @brief Macro used by the assert function in order to check the type of the ID to be sent.
|
||||
*/
|
||||
#define IS_CAN_IDTYPE_OK(IDTYPE) (((IDTYPE) == CAN_Id_Standard) || ((IDTYPE) == CAN_Id_Extended))
|
||||
/**
|
||||
* @brief Macro used by the assert function in order to check CAN transmission Frame Type.
|
||||
*/
|
||||
#define IS_CAN_RTR_OK(RTR) (((RTR) == CAN_RTR_Data) || ((RTR) == CAN_RTR_Remote))
|
||||
|
||||
/**
|
||||
* @brief Macro used by the assert function in order to check CAN flags which can be got by @ref CAN_GetFlagStatus
|
||||
*/
|
||||
#define IS_CAN_FLAG_STATUS_OK(FLAG) (((FLAG) == CAN_FLAG_RQCP0) || ((FLAG) == CAN_FLAG_RQCP1) ||\
|
||||
((FLAG) == CAN_FLAG_RQCP2) || ((FLAG) == CAN_FLAG_FMP) ||\
|
||||
((FLAG) == CAN_FLAG_FF) || ((FLAG) == CAN_FLAG_FOV) ||\
|
||||
((FLAG) == CAN_FLAG_WKU) || ((FLAG) == CAN_FLAG_EWG) ||\
|
||||
((FLAG) == CAN_FLAG_EPV) || ((FLAG) == CAN_FLAG_BOF) ||\
|
||||
((FLAG) == CAN_FLAG_LEC))
|
||||
/**
|
||||
* @brief Macro used by the assert function in order to check CAN flags which can be cleared by @ref CAN_ClearFlag
|
||||
*/
|
||||
#define IS_CAN_FLAG_CLEAR_OK(FLAG) (((FLAG) == CAN_FLAG_RQCP0) || ((FLAG) == CAN_FLAG_RQCP1) ||\
|
||||
((FLAG) == CAN_FLAG_RQCP2) || ((FLAG) == CAN_FLAG_FF) ||\
|
||||
((FLAG) == CAN_FLAG_FOV) || ((FLAG) == CAN_FLAG_WKU) ||\
|
||||
((FLAG) == CAN_FLAG_LEC))
|
||||
/**
|
||||
* @brief Macro used by the assert function in order to check the CAN Configuration interrupts.
|
||||
*/
|
||||
#define CAN_IT_CONFIG_MASK ~(uint16_t)(CAN_IT_TME|CAN_IT_FMP|CAN_IT_FF|CAN_IT_FOV|CAN_IT_WKU|CAN_IT_EWG|CAN_IT_EPV|CAN_IT_BOF|CAN_IT_LEC|CAN_IT_ERR)
|
||||
#define IS_CAN_IT_CONFIG_OK(IT) (((IT) != 0x0000) && ((uint16_t)((uint16_t)(IT) & (uint16_t)CAN_IT_CONFIG_MASK) == 0x0000))
|
||||
/**
|
||||
* @brief Macro used by the assert function in order to check the CAN status interrupts.
|
||||
*/
|
||||
#define IS_CAN_IT_STATUS_OK(IT) (((IT) == CAN_IT_TME) || ((IT) == CAN_IT_FMP) ||\
|
||||
((IT) == CAN_IT_FF) || ((IT) == CAN_IT_FOV) || \
|
||||
((IT) == CAN_IT_WKU) || ((IT) == CAN_IT_ERR) || \
|
||||
((IT) == CAN_IT_EWG) || ((IT) == CAN_IT_EPV) || \
|
||||
((IT) == CAN_IT_BOF) || ((IT) == CAN_IT_LEC) )
|
||||
/**
|
||||
* @brief Macro used by the assert function in order to check the CAN Pending bit interrupts.
|
||||
*/
|
||||
#define IS_CAN_IT_PENDING_BIT_OK(IT) (((IT) == CAN_IT_TME) || ((IT) == CAN_IT_FF) ||\
|
||||
((IT) == CAN_IT_FOV) || ((IT) == CAN_IT_WKU) ||\
|
||||
((IT) == CAN_IT_ERR) || ((IT) == CAN_IT_EWG) ||\
|
||||
((IT) == CAN_IT_EPV) || ((IT) == CAN_IT_BOF)||\
|
||||
((IT) == CAN_IT_LEC))
|
||||
/**
|
||||
* @brief Macro used by the assert function in order to check the Last Error Code.
|
||||
*/
|
||||
#define IS_CAN_LAST_ERROR_CODE_OK(CODE) (((CODE) & 0x8F) == 0x00)
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/* Exported function prototypes --------------------------------------------- */
|
||||
/** @addtogroup CAN_Exported_Functions
|
||||
* @{
|
||||
*/
|
||||
void CAN_DeInit(void);
|
||||
CAN_InitStatus_TypeDef CAN_Init(CAN_MasterCtrl_TypeDef CAN_MasterCtrl,
|
||||
CAN_Mode_TypeDef CAN_Mode,
|
||||
CAN_SynJumpWidth_TypeDef CAN_SynJumpWidth,
|
||||
CAN_BitSeg1_TypeDef CAN_BitSeg1,
|
||||
CAN_BitSeg2_TypeDef CAN_BitSeg2,
|
||||
uint8_t CAN_Prescaler);
|
||||
|
||||
void CAN_FilterInit(CAN_FilterNumber_TypeDef CAN_FilterNumber,
|
||||
FunctionalState CAN_FilterActivation,
|
||||
CAN_FilterMode_TypeDef CAN_FilterMode,
|
||||
CAN_FilterScale_TypeDef CAN_FilterScale,
|
||||
uint8_t CAN_FilterID1,
|
||||
uint8_t CAN_FilterID2,
|
||||
uint8_t CAN_FilterID3,
|
||||
uint8_t CAN_FilterID4,
|
||||
uint8_t CAN_FilterIDMask1,
|
||||
uint8_t CAN_FilterIDMask2,
|
||||
uint8_t CAN_FilterIDMask3,
|
||||
uint8_t CAN_FilterIDMask4);
|
||||
void CAN_ITConfig(CAN_IT_TypeDef CAN_IT, FunctionalState NewState);
|
||||
void CAN_ST7CompatibilityCmd(CAN_ST7Compatibility_TypeDef CAN_ST7Compatibility);
|
||||
CAN_TxStatus_TypeDef CAN_Transmit( uint32_t CAN_Id,
|
||||
CAN_Id_TypeDef CAN_IDE,
|
||||
CAN_RTR_TypeDef CAN_RTR,
|
||||
uint8_t CAN_DLC,
|
||||
uint8_t *CAN_Data);
|
||||
void CAN_TTComModeCmd(FunctionalState NewState);
|
||||
CAN_TxStatus_TypeDef CAN_TransmitStatus(CAN_TransmitMailBox_TypeDef CAN_TransmitMailbox);
|
||||
void CAN_CancelTransmit(CAN_TransmitMailBox_TypeDef CAN_TransmitMailbox);
|
||||
void CAN_FIFORelease(void);
|
||||
CAN_NbrPendingMessage_TypeDef CAN_MessagePending(void);
|
||||
void CAN_Receive(void);
|
||||
uint32_t CAN_GetReceivedId(void);
|
||||
CAN_Id_TypeDef CAN_GetReceivedIDE(void);
|
||||
CAN_RTR_TypeDef CAN_GetReceivedRTR(void);
|
||||
uint8_t CAN_GetReceivedDLC(void);
|
||||
uint8_t CAN_GetReceivedData(uint8_t CAN_DataIndex);
|
||||
uint8_t CAN_GetReceivedFMI(void);
|
||||
uint16_t CAN_GetMessageTimeStamp(void);
|
||||
CAN_Sleep_TypeDef CAN_Sleep(void);
|
||||
CAN_WakeUp_TypeDef CAN_WakeUp(void);
|
||||
CAN_ModeStatus_TypeDef CAN_OperatingModeRequest(CAN_OperatingMode_TypeDef CAN_OperatingMode);
|
||||
CAN_ErrorCode_TypeDef CAN_GetLastErrorCode(void);
|
||||
CAN_Page_TypeDef CAN_GetSelectedPage(void);
|
||||
void CAN_SelectPage(CAN_Page_TypeDef CAN_Page);
|
||||
FlagStatus CAN_GetFlagStatus(CAN_FLAG_TypeDef CAN_Flag);
|
||||
void CAN_ClearFlag(CAN_FLAG_TypeDef CAN_Flag);
|
||||
ITStatus CAN_GetITStatus(CAN_IT_TypeDef CAN_IT);
|
||||
void CAN_ClearITPendingBit(CAN_IT_TypeDef CAN_IT);
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
#endif /* __STM8S_CAN_H */
|
||||
|
||||
|
||||
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
|
||||
382
Serial/inc/stm8s_clk.h
Normal file
382
Serial/inc/stm8s_clk.h
Normal file
@@ -0,0 +1,382 @@
|
||||
/**
|
||||
******************************************************************************
|
||||
* @file stm8s_clk.h
|
||||
* @author MCD Application Team
|
||||
* @version V2.3.0
|
||||
* @date 16-June-2017
|
||||
* @brief This file contains all functions prototype and macros for the CLK peripheral.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© COPYRIGHT 2014 STMicroelectronics</center></h2>
|
||||
*
|
||||
* Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
|
||||
* You may not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at:
|
||||
*
|
||||
* http://www.st.com/software_license_agreement_liberty_v2
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an "AS IS" BASIS,
|
||||
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
|
||||
/* Define to prevent recursive inclusion -------------------------------------*/
|
||||
#ifndef __STM8S_CLK_H
|
||||
#define __STM8S_CLK_H
|
||||
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
/* Contains the description of all STM8 hardware registers */
|
||||
#include "stm8s.h"
|
||||
|
||||
/* Exported types ------------------------------------------------------------*/
|
||||
/** @addtogroup CLK_Exported_Types
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @brief Switch Mode Auto, Manual.
|
||||
*/
|
||||
typedef enum {
|
||||
CLK_SWITCHMODE_MANUAL = (uint8_t)0x00, /*!< Enable the manual clock switching mode */
|
||||
CLK_SWITCHMODE_AUTO = (uint8_t)0x01 /*!< Enable the automatic clock switching mode */
|
||||
} CLK_SwitchMode_TypeDef;
|
||||
|
||||
/**
|
||||
* @brief Current Clock State.
|
||||
*/
|
||||
typedef enum {
|
||||
CLK_CURRENTCLOCKSTATE_DISABLE = (uint8_t)0x00, /*!< Current clock disable */
|
||||
CLK_CURRENTCLOCKSTATE_ENABLE = (uint8_t)0x01 /*!< Current clock enable */
|
||||
} CLK_CurrentClockState_TypeDef;
|
||||
|
||||
/**
|
||||
* @brief Clock security system configuration.
|
||||
*/
|
||||
typedef enum {
|
||||
CLK_CSSCONFIG_ENABLEWITHIT = (uint8_t)0x05, /*!< Enable CSS with detection interrupt */
|
||||
CLK_CSSCONFIG_ENABLE = (uint8_t)0x01, /*!< Enable CSS without detection interrupt */
|
||||
CLK_CSSCONFIG_DISABLE = (uint8_t)0x00 /*!< Leave CSS desactivated (to be used in CLK_Init() function) */
|
||||
} CLK_CSSConfig_TypeDef;
|
||||
|
||||
/**
|
||||
* @brief CLK Clock Source.
|
||||
*/
|
||||
typedef enum {
|
||||
CLK_SOURCE_HSI = (uint8_t)0xE1, /*!< Clock Source HSI. */
|
||||
CLK_SOURCE_LSI = (uint8_t)0xD2, /*!< Clock Source LSI. */
|
||||
CLK_SOURCE_HSE = (uint8_t)0xB4 /*!< Clock Source HSE. */
|
||||
} CLK_Source_TypeDef;
|
||||
|
||||
/**
|
||||
* @brief CLK HSI Calibration Value.
|
||||
*/
|
||||
typedef enum {
|
||||
CLK_HSITRIMVALUE_0 = (uint8_t)0x00, /*!< HSI Calibration Value 0 */
|
||||
CLK_HSITRIMVALUE_1 = (uint8_t)0x01, /*!< HSI Calibration Value 1 */
|
||||
CLK_HSITRIMVALUE_2 = (uint8_t)0x02, /*!< HSI Calibration Value 2 */
|
||||
CLK_HSITRIMVALUE_3 = (uint8_t)0x03, /*!< HSI Calibration Value 3 */
|
||||
CLK_HSITRIMVALUE_4 = (uint8_t)0x04, /*!< HSI Calibration Value 4 */
|
||||
CLK_HSITRIMVALUE_5 = (uint8_t)0x05, /*!< HSI Calibration Value 5 */
|
||||
CLK_HSITRIMVALUE_6 = (uint8_t)0x06, /*!< HSI Calibration Value 6 */
|
||||
CLK_HSITRIMVALUE_7 = (uint8_t)0x07 /*!< HSI Calibration Value 7 */
|
||||
} CLK_HSITrimValue_TypeDef;
|
||||
|
||||
/**
|
||||
* @brief CLK Clock Output
|
||||
*/
|
||||
typedef enum {
|
||||
CLK_OUTPUT_HSI = (uint8_t)0x00, /*!< Clock Output HSI */
|
||||
CLK_OUTPUT_LSI = (uint8_t)0x02, /*!< Clock Output LSI */
|
||||
CLK_OUTPUT_HSE = (uint8_t)0x04, /*!< Clock Output HSE */
|
||||
CLK_OUTPUT_CPU = (uint8_t)0x08, /*!< Clock Output CPU */
|
||||
CLK_OUTPUT_CPUDIV2 = (uint8_t)0x0A, /*!< Clock Output CPU/2 */
|
||||
CLK_OUTPUT_CPUDIV4 = (uint8_t)0x0C, /*!< Clock Output CPU/4 */
|
||||
CLK_OUTPUT_CPUDIV8 = (uint8_t)0x0E, /*!< Clock Output CPU/8 */
|
||||
CLK_OUTPUT_CPUDIV16 = (uint8_t)0x10, /*!< Clock Output CPU/16 */
|
||||
CLK_OUTPUT_CPUDIV32 = (uint8_t)0x12, /*!< Clock Output CPU/32 */
|
||||
CLK_OUTPUT_CPUDIV64 = (uint8_t)0x14, /*!< Clock Output CPU/64 */
|
||||
CLK_OUTPUT_HSIRC = (uint8_t)0x16, /*!< Clock Output HSI RC */
|
||||
CLK_OUTPUT_MASTER = (uint8_t)0x18, /*!< Clock Output Master */
|
||||
CLK_OUTPUT_OTHERS = (uint8_t)0x1A /*!< Clock Output OTHER */
|
||||
} CLK_Output_TypeDef;
|
||||
|
||||
/**
|
||||
* @brief CLK Enable peripheral
|
||||
*/
|
||||
/* Elements values convention: 0xXY
|
||||
X = choice between the peripheral registers
|
||||
X = 0 : PCKENR1
|
||||
X = 1 : PCKENR2
|
||||
Y = Peripheral position in the register
|
||||
*/
|
||||
typedef enum {
|
||||
CLK_PERIPHERAL_I2C = (uint8_t)0x00, /*!< Peripheral Clock Enable 1, I2C */
|
||||
CLK_PERIPHERAL_SPI = (uint8_t)0x01, /*!< Peripheral Clock Enable 1, SPI */
|
||||
#if defined(STM8S208) || defined(STM8S207) || defined(STM8S007) || defined(STM8AF52Ax) || defined(STM8AF62Ax)
|
||||
CLK_PERIPHERAL_UART1 = (uint8_t)0x02, /*!< Peripheral Clock Enable 1, UART1 */
|
||||
#else
|
||||
CLK_PERIPHERAL_UART1 = (uint8_t)0x03, /*!< Peripheral Clock Enable 1, UART1 */
|
||||
#endif
|
||||
CLK_PERIPHERAL_UART2 = (uint8_t)0x03, /*!< Peripheral Clock Enable 1, UART2 */
|
||||
CLK_PERIPHERAL_UART3 = (uint8_t)0x03, /*!< Peripheral Clock Enable 1, UART3 */
|
||||
CLK_PERIPHERAL_TIMER6 = (uint8_t)0x04, /*!< Peripheral Clock Enable 1, Timer6 */
|
||||
CLK_PERIPHERAL_TIMER4 = (uint8_t)0x04, /*!< Peripheral Clock Enable 1, Timer4 */
|
||||
CLK_PERIPHERAL_TIMER5 = (uint8_t)0x05, /*!< Peripheral Clock Enable 1, Timer5 */
|
||||
CLK_PERIPHERAL_TIMER2 = (uint8_t)0x05, /*!< Peripheral Clock Enable 1, Timer2 */
|
||||
CLK_PERIPHERAL_TIMER3 = (uint8_t)0x06, /*!< Peripheral Clock Enable 1, Timer3 */
|
||||
CLK_PERIPHERAL_TIMER1 = (uint8_t)0x07, /*!< Peripheral Clock Enable 1, Timer1 */
|
||||
CLK_PERIPHERAL_AWU = (uint8_t)0x12, /*!< Peripheral Clock Enable 2, AWU */
|
||||
CLK_PERIPHERAL_ADC = (uint8_t)0x13, /*!< Peripheral Clock Enable 2, ADC */
|
||||
CLK_PERIPHERAL_CAN = (uint8_t)0x17 /*!< Peripheral Clock Enable 2, CAN */
|
||||
} CLK_Peripheral_TypeDef;
|
||||
|
||||
/**
|
||||
* @brief CLK Flags.
|
||||
*/
|
||||
/* Elements values convention: 0xXZZ
|
||||
X = choice between the flags registers
|
||||
X = 1 : ICKR
|
||||
X = 2 : ECKR
|
||||
X = 3 : SWCR
|
||||
X = 4 : CSSR
|
||||
X = 5 : CCOR
|
||||
ZZ = flag mask in the register (same as map file)
|
||||
*/
|
||||
typedef enum {
|
||||
CLK_FLAG_LSIRDY = (uint16_t)0x0110, /*!< Low speed internal oscillator ready Flag */
|
||||
CLK_FLAG_HSIRDY = (uint16_t)0x0102, /*!< High speed internal oscillator ready Flag */
|
||||
CLK_FLAG_HSERDY = (uint16_t)0x0202, /*!< High speed external oscillator ready Flag */
|
||||
CLK_FLAG_SWIF = (uint16_t)0x0308, /*!< Clock switch interrupt Flag */
|
||||
CLK_FLAG_SWBSY = (uint16_t)0x0301, /*!< Switch busy Flag */
|
||||
CLK_FLAG_CSSD = (uint16_t)0x0408, /*!< Clock security system detection Flag */
|
||||
CLK_FLAG_AUX = (uint16_t)0x0402, /*!< Auxiliary oscillator connected to master clock */
|
||||
CLK_FLAG_CCOBSY = (uint16_t)0x0504, /*!< Configurable clock output busy */
|
||||
CLK_FLAG_CCORDY = (uint16_t)0x0502 /*!< Configurable clock output ready */
|
||||
}CLK_Flag_TypeDef;
|
||||
|
||||
/**
|
||||
* @brief CLK interrupt configuration and Flags cleared by software.
|
||||
*/
|
||||
typedef enum {
|
||||
CLK_IT_CSSD = (uint8_t)0x0C, /*!< Clock security system detection Flag */
|
||||
CLK_IT_SWIF = (uint8_t)0x1C /*!< Clock switch interrupt Flag */
|
||||
}CLK_IT_TypeDef;
|
||||
|
||||
/**
|
||||
* @brief CLK Clock Divisor.
|
||||
*/
|
||||
|
||||
/* Warning:
|
||||
0xxxxxx = HSI divider
|
||||
1xxxxxx = CPU divider
|
||||
Other bits correspond to the divider's bits mapping
|
||||
*/
|
||||
typedef enum {
|
||||
CLK_PRESCALER_HSIDIV1 = (uint8_t)0x00, /*!< High speed internal clock prescaler: 1 */
|
||||
CLK_PRESCALER_HSIDIV2 = (uint8_t)0x08, /*!< High speed internal clock prescaler: 2 */
|
||||
CLK_PRESCALER_HSIDIV4 = (uint8_t)0x10, /*!< High speed internal clock prescaler: 4 */
|
||||
CLK_PRESCALER_HSIDIV8 = (uint8_t)0x18, /*!< High speed internal clock prescaler: 8 */
|
||||
CLK_PRESCALER_CPUDIV1 = (uint8_t)0x80, /*!< CPU clock division factors 1 */
|
||||
CLK_PRESCALER_CPUDIV2 = (uint8_t)0x81, /*!< CPU clock division factors 2 */
|
||||
CLK_PRESCALER_CPUDIV4 = (uint8_t)0x82, /*!< CPU clock division factors 4 */
|
||||
CLK_PRESCALER_CPUDIV8 = (uint8_t)0x83, /*!< CPU clock division factors 8 */
|
||||
CLK_PRESCALER_CPUDIV16 = (uint8_t)0x84, /*!< CPU clock division factors 16 */
|
||||
CLK_PRESCALER_CPUDIV32 = (uint8_t)0x85, /*!< CPU clock division factors 32 */
|
||||
CLK_PRESCALER_CPUDIV64 = (uint8_t)0x86, /*!< CPU clock division factors 64 */
|
||||
CLK_PRESCALER_CPUDIV128 = (uint8_t)0x87 /*!< CPU clock division factors 128 */
|
||||
} CLK_Prescaler_TypeDef;
|
||||
|
||||
/**
|
||||
* @brief SWIM Clock divider.
|
||||
*/
|
||||
typedef enum {
|
||||
CLK_SWIMDIVIDER_2 = (uint8_t)0x00, /*!< SWIM clock is divided by 2 */
|
||||
CLK_SWIMDIVIDER_OTHER = (uint8_t)0x01 /*!< SWIM clock is not divided by 2 */
|
||||
}CLK_SWIMDivider_TypeDef;
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/* Exported constants --------------------------------------------------------*/
|
||||
|
||||
/** @addtogroup CLK_Exported_Constants
|
||||
* @{
|
||||
*/
|
||||
#define CLK_TIMEOUT ((uint16_t)0xFFFF) /*!< Max Timeout for the clock switch operation. */
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/* Private macros ------------------------------------------------------------*/
|
||||
/** @addtogroup CLK_Private_Macros
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @brief Macros used by the assert function in order to check the different functions parameters.
|
||||
*/
|
||||
|
||||
/**
|
||||
* @brief Macros used by the assert function in order to check the clock switching modes.
|
||||
*/
|
||||
#define IS_CLK_SWITCHMODE_OK(MODE) (((MODE) == CLK_SWITCHMODE_MANUAL) || ((MODE) == CLK_SWITCHMODE_AUTO))
|
||||
|
||||
/**
|
||||
* @brief Macros used by the assert function in order to check the current clock state.
|
||||
*/
|
||||
#define IS_CLK_CURRENTCLOCKSTATE_OK(STATE) (((STATE) == CLK_CURRENTCLOCKSTATE_DISABLE) ||\
|
||||
((STATE) == CLK_CURRENTCLOCKSTATE_ENABLE))
|
||||
|
||||
/**
|
||||
* @brief Macros used by the assert function in order to check the CSS configuration.
|
||||
*/
|
||||
#define IS_CLK_CSSCONFIG_OK(CSSVALUE) (((CSSVALUE) == CLK_CSSCONFIG_ENABLEWITHIT) ||\
|
||||
((CSSVALUE) == CLK_CSSCONFIG_ENABLE) ||\
|
||||
((CSSVALUE) == CLK_CSSCONFIG_DISABLE))
|
||||
|
||||
/**
|
||||
* @brief Macros used by the assert function in order to check the different clock sources.
|
||||
*/
|
||||
#define IS_CLK_SOURCE_OK(SOURCE) (((SOURCE) == CLK_SOURCE_HSI) ||\
|
||||
((SOURCE) == CLK_SOURCE_LSI) ||\
|
||||
((SOURCE) == CLK_SOURCE_HSE))
|
||||
|
||||
/**
|
||||
* @brief Macros used by the assert function in order to check the different HSI trimming values.
|
||||
*/
|
||||
#define IS_CLK_HSITRIMVALUE_OK(TRIMVALUE) (((TRIMVALUE) == CLK_HSITRIMVALUE_0) ||\
|
||||
((TRIMVALUE) == CLK_HSITRIMVALUE_1) ||\
|
||||
((TRIMVALUE) == CLK_HSITRIMVALUE_2) ||\
|
||||
((TRIMVALUE) == CLK_HSITRIMVALUE_3) ||\
|
||||
((TRIMVALUE) == CLK_HSITRIMVALUE_4) ||\
|
||||
((TRIMVALUE) == CLK_HSITRIMVALUE_5) ||\
|
||||
((TRIMVALUE) == CLK_HSITRIMVALUE_6) ||\
|
||||
((TRIMVALUE) == CLK_HSITRIMVALUE_7))
|
||||
|
||||
/**
|
||||
* @brief Macros used by the assert function in order to check the different clocks to output.
|
||||
*/
|
||||
#define IS_CLK_OUTPUT_OK(OUTPUT) (((OUTPUT) == CLK_OUTPUT_HSI) ||\
|
||||
((OUTPUT) == CLK_OUTPUT_HSE) ||\
|
||||
((OUTPUT) == CLK_OUTPUT_LSI) ||\
|
||||
((OUTPUT) == CLK_OUTPUT_CPU) ||\
|
||||
((OUTPUT) == CLK_OUTPUT_CPUDIV2) ||\
|
||||
((OUTPUT) == CLK_OUTPUT_CPUDIV4) ||\
|
||||
((OUTPUT) == CLK_OUTPUT_CPUDIV8) ||\
|
||||
((OUTPUT) == CLK_OUTPUT_CPUDIV16) ||\
|
||||
((OUTPUT) == CLK_OUTPUT_CPUDIV32) ||\
|
||||
((OUTPUT) == CLK_OUTPUT_CPUDIV64) ||\
|
||||
((OUTPUT) == CLK_OUTPUT_HSIRC) ||\
|
||||
((OUTPUT) == CLK_OUTPUT_MASTER) ||\
|
||||
((OUTPUT) == CLK_OUTPUT_OTHERS))
|
||||
|
||||
/**
|
||||
* @brief Macros used by the assert function in order to check the different peripheral's clock.
|
||||
*/
|
||||
#define IS_CLK_PERIPHERAL_OK(PERIPHERAL) (((PERIPHERAL) == CLK_PERIPHERAL_I2C) ||\
|
||||
((PERIPHERAL) == CLK_PERIPHERAL_SPI) ||\
|
||||
((PERIPHERAL) == CLK_PERIPHERAL_UART3) ||\
|
||||
((PERIPHERAL) == CLK_PERIPHERAL_UART2) ||\
|
||||
((PERIPHERAL) == CLK_PERIPHERAL_UART1) ||\
|
||||
((PERIPHERAL) == CLK_PERIPHERAL_TIMER4) ||\
|
||||
((PERIPHERAL) == CLK_PERIPHERAL_TIMER2) ||\
|
||||
((PERIPHERAL) == CLK_PERIPHERAL_TIMER5) ||\
|
||||
((PERIPHERAL) == CLK_PERIPHERAL_TIMER6) ||\
|
||||
((PERIPHERAL) == CLK_PERIPHERAL_TIMER3) ||\
|
||||
((PERIPHERAL) == CLK_PERIPHERAL_TIMER1) ||\
|
||||
((PERIPHERAL) == CLK_PERIPHERAL_CAN) ||\
|
||||
((PERIPHERAL) == CLK_PERIPHERAL_ADC) ||\
|
||||
((PERIPHERAL) == CLK_PERIPHERAL_AWU))
|
||||
|
||||
/**
|
||||
* @brief Macros used by the assert function in order to check the different clock flags.
|
||||
*/
|
||||
#define IS_CLK_FLAG_OK(FLAG) (((FLAG) == CLK_FLAG_LSIRDY) ||\
|
||||
((FLAG) == CLK_FLAG_HSIRDY) ||\
|
||||
((FLAG) == CLK_FLAG_HSERDY) ||\
|
||||
((FLAG) == CLK_FLAG_SWIF) ||\
|
||||
((FLAG) == CLK_FLAG_SWBSY) ||\
|
||||
((FLAG) == CLK_FLAG_CSSD) ||\
|
||||
((FLAG) == CLK_FLAG_AUX) ||\
|
||||
((FLAG) == CLK_FLAG_CCOBSY) ||\
|
||||
((FLAG) == CLK_FLAG_CCORDY))
|
||||
|
||||
/**
|
||||
* @brief Macros used by the assert function in order to check the different clock IT pending bits.
|
||||
*/
|
||||
#define IS_CLK_IT_OK(IT) (((IT) == CLK_IT_CSSD) || ((IT) == CLK_IT_SWIF))
|
||||
|
||||
/**
|
||||
* @brief Macros used by the assert function in order to check the different HSI prescaler values.
|
||||
*/
|
||||
#define IS_CLK_HSIPRESCALER_OK(PRESCALER) (((PRESCALER) == CLK_PRESCALER_HSIDIV1) ||\
|
||||
((PRESCALER) == CLK_PRESCALER_HSIDIV2) ||\
|
||||
((PRESCALER) == CLK_PRESCALER_HSIDIV4) ||\
|
||||
((PRESCALER) == CLK_PRESCALER_HSIDIV8))
|
||||
|
||||
/**
|
||||
* @brief Macros used by the assert function in order to check the different clock prescaler values.
|
||||
*/
|
||||
#define IS_CLK_PRESCALER_OK(PRESCALER) (((PRESCALER) == CLK_PRESCALER_HSIDIV1) ||\
|
||||
((PRESCALER) == CLK_PRESCALER_HSIDIV2) ||\
|
||||
((PRESCALER) == CLK_PRESCALER_HSIDIV4) ||\
|
||||
((PRESCALER) == CLK_PRESCALER_HSIDIV8) ||\
|
||||
((PRESCALER) == CLK_PRESCALER_CPUDIV1) ||\
|
||||
((PRESCALER) == CLK_PRESCALER_CPUDIV2) ||\
|
||||
((PRESCALER) == CLK_PRESCALER_CPUDIV4) ||\
|
||||
((PRESCALER) == CLK_PRESCALER_CPUDIV8) ||\
|
||||
((PRESCALER) == CLK_PRESCALER_CPUDIV16) ||\
|
||||
((PRESCALER) == CLK_PRESCALER_CPUDIV32) ||\
|
||||
((PRESCALER) == CLK_PRESCALER_CPUDIV64) ||\
|
||||
((PRESCALER) == CLK_PRESCALER_CPUDIV128))
|
||||
|
||||
/**
|
||||
* @brief Macros used by the assert function in order to check the different SWIM dividers values.
|
||||
*/
|
||||
#define IS_CLK_SWIMDIVIDER_OK(SWIMDIVIDER) (((SWIMDIVIDER) == CLK_SWIMDIVIDER_2) || ((SWIMDIVIDER) == CLK_SWIMDIVIDER_OTHER))
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @addtogroup CLK_Exported_functions
|
||||
* @{
|
||||
*/
|
||||
void CLK_DeInit(void);
|
||||
void CLK_HSECmd(FunctionalState NewState);
|
||||
void CLK_HSICmd(FunctionalState NewState);
|
||||
void CLK_LSICmd(FunctionalState NewState);
|
||||
void CLK_CCOCmd(FunctionalState NewState);
|
||||
void CLK_ClockSwitchCmd(FunctionalState NewState);
|
||||
void CLK_FastHaltWakeUpCmd(FunctionalState NewState);
|
||||
void CLK_SlowActiveHaltWakeUpCmd(FunctionalState NewState);
|
||||
void CLK_PeripheralClockConfig(CLK_Peripheral_TypeDef CLK_Peripheral, FunctionalState NewState);
|
||||
ErrorStatus CLK_ClockSwitchConfig(CLK_SwitchMode_TypeDef CLK_SwitchMode, CLK_Source_TypeDef CLK_NewClock, FunctionalState ITState, CLK_CurrentClockState_TypeDef CLK_CurrentClockState);
|
||||
void CLK_HSIPrescalerConfig(CLK_Prescaler_TypeDef HSIPrescaler);
|
||||
void CLK_CCOConfig(CLK_Output_TypeDef CLK_CCO);
|
||||
void CLK_ITConfig(CLK_IT_TypeDef CLK_IT, FunctionalState NewState);
|
||||
void CLK_SYSCLKConfig(CLK_Prescaler_TypeDef CLK_Prescaler);
|
||||
void CLK_SWIMConfig(CLK_SWIMDivider_TypeDef CLK_SWIMDivider);
|
||||
void CLK_ClockSecuritySystemEnable(void);
|
||||
void CLK_SYSCLKEmergencyClear(void);
|
||||
void CLK_AdjustHSICalibrationValue(CLK_HSITrimValue_TypeDef CLK_HSICalibrationValue);
|
||||
uint32_t CLK_GetClockFreq(void);
|
||||
CLK_Source_TypeDef CLK_GetSYSCLKSource(void);
|
||||
FlagStatus CLK_GetFlagStatus(CLK_Flag_TypeDef CLK_FLAG);
|
||||
ITStatus CLK_GetITStatus(CLK_IT_TypeDef CLK_IT);
|
||||
void CLK_ClearITPendingBit(CLK_IT_TypeDef CLK_IT);
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
#endif /* __STM8S_CLK_H */
|
||||
|
||||
|
||||
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
|
||||
134
Serial/inc/stm8s_exti.h
Normal file
134
Serial/inc/stm8s_exti.h
Normal file
@@ -0,0 +1,134 @@
|
||||
/**
|
||||
******************************************************************************
|
||||
* @file stm8s_exti.h
|
||||
* @author MCD Application Team
|
||||
* @version V2.3.0
|
||||
* @date 16-June-2017
|
||||
* @brief This file contains all functions prototype and macros for the EXTI peripheral.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© COPYRIGHT 2014 STMicroelectronics</center></h2>
|
||||
*
|
||||
* Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
|
||||
* You may not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at:
|
||||
*
|
||||
* http://www.st.com/software_license_agreement_liberty_v2
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an "AS IS" BASIS,
|
||||
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
/* Define to prevent recursive inclusion -------------------------------------*/
|
||||
#ifndef __STM8S_EXTI_H
|
||||
#define __STM8S_EXTI_H
|
||||
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
#include "stm8s.h"
|
||||
|
||||
/* Exported types ------------------------------------------------------------*/
|
||||
|
||||
/** @addtogroup EXTI_Exported_Types
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @brief EXTI Sensitivity values for PORTA to PORTE
|
||||
*/
|
||||
typedef enum {
|
||||
EXTI_SENSITIVITY_FALL_LOW = (uint8_t)0x00, /*!< Interrupt on Falling edge and Low level */
|
||||
EXTI_SENSITIVITY_RISE_ONLY = (uint8_t)0x01, /*!< Interrupt on Rising edge only */
|
||||
EXTI_SENSITIVITY_FALL_ONLY = (uint8_t)0x02, /*!< Interrupt on Falling edge only */
|
||||
EXTI_SENSITIVITY_RISE_FALL = (uint8_t)0x03 /*!< Interrupt on Rising and Falling edges */
|
||||
} EXTI_Sensitivity_TypeDef;
|
||||
|
||||
/**
|
||||
* @brief EXTI Sensitivity values for TLI
|
||||
*/
|
||||
typedef enum {
|
||||
EXTI_TLISENSITIVITY_FALL_ONLY = (uint8_t)0x00, /*!< Top Level Interrupt on Falling edge only */
|
||||
EXTI_TLISENSITIVITY_RISE_ONLY = (uint8_t)0x04 /*!< Top Level Interrupt on Rising edge only */
|
||||
} EXTI_TLISensitivity_TypeDef;
|
||||
|
||||
/**
|
||||
* @brief EXTI PortNum possible values
|
||||
*/
|
||||
typedef enum {
|
||||
EXTI_PORT_GPIOA = (uint8_t)0x00, /*!< GPIO Port A */
|
||||
EXTI_PORT_GPIOB = (uint8_t)0x01, /*!< GPIO Port B */
|
||||
EXTI_PORT_GPIOC = (uint8_t)0x02, /*!< GPIO Port C */
|
||||
EXTI_PORT_GPIOD = (uint8_t)0x03, /*!< GPIO Port D */
|
||||
EXTI_PORT_GPIOE = (uint8_t)0x04 /*!< GPIO Port E */
|
||||
} EXTI_Port_TypeDef;
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/* Private macros ------------------------------------------------------------*/
|
||||
|
||||
/** @addtogroup EXTI_Private_Macros
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @brief Macro used by the assert function in order to check the different sensitivity values for PORTA to PORTE.
|
||||
*/
|
||||
#define IS_EXTI_SENSITIVITY_OK(SensitivityValue) \
|
||||
(((SensitivityValue) == EXTI_SENSITIVITY_FALL_LOW) || \
|
||||
((SensitivityValue) == EXTI_SENSITIVITY_RISE_ONLY) || \
|
||||
((SensitivityValue) == EXTI_SENSITIVITY_FALL_ONLY) || \
|
||||
((SensitivityValue) == EXTI_SENSITIVITY_RISE_FALL))
|
||||
|
||||
/**
|
||||
* @brief Macro used by the assert function in order to check the different sensitivity values for TLI.
|
||||
*/
|
||||
#define IS_EXTI_TLISENSITIVITY_OK(SensitivityValue) \
|
||||
(((SensitivityValue) == EXTI_TLISENSITIVITY_FALL_ONLY) || \
|
||||
((SensitivityValue) == EXTI_TLISENSITIVITY_RISE_ONLY))
|
||||
|
||||
/**
|
||||
* @brief Macro used by the assert function in order to check the different Port values
|
||||
*/
|
||||
#define IS_EXTI_PORT_OK(PORT) \
|
||||
(((PORT) == EXTI_PORT_GPIOA) ||\
|
||||
((PORT) == EXTI_PORT_GPIOB) ||\
|
||||
((PORT) == EXTI_PORT_GPIOC) ||\
|
||||
((PORT) == EXTI_PORT_GPIOD) ||\
|
||||
((PORT) == EXTI_PORT_GPIOE))
|
||||
|
||||
/**
|
||||
* @brief Macro used by the assert function in order to check the different values of the EXTI PinMask
|
||||
*/
|
||||
#define IS_EXTI_PINMASK_OK(PinMask) ((((PinMask) & (uint8_t)0x00) == (uint8_t)0x00) && ((PinMask) != (uint8_t)0x00))
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/* Exported functions ------------------------------------------------------- */
|
||||
|
||||
/** @addtogroup EXTI_Exported_Functions
|
||||
* @{
|
||||
*/
|
||||
|
||||
void EXTI_DeInit(void);
|
||||
void EXTI_SetExtIntSensitivity(EXTI_Port_TypeDef Port, EXTI_Sensitivity_TypeDef SensitivityValue);
|
||||
void EXTI_SetTLISensitivity(EXTI_TLISensitivity_TypeDef SensitivityValue);
|
||||
EXTI_Sensitivity_TypeDef EXTI_GetExtIntSensitivity(EXTI_Port_TypeDef Port);
|
||||
EXTI_TLISensitivity_TypeDef EXTI_GetTLISensitivity(void);
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
#endif /* __STM8S_EXTI_H */
|
||||
|
||||
|
||||
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
|
||||
300
Serial/inc/stm8s_flash.h
Normal file
300
Serial/inc/stm8s_flash.h
Normal file
@@ -0,0 +1,300 @@
|
||||
/**
|
||||
******************************************************************************
|
||||
* @file stm8s_flash.h
|
||||
* @author MCD Application Team
|
||||
* @version V2.3.0
|
||||
* @date 16-June-2017
|
||||
* @brief This file contains all functions prototype and macros for the FLASH peripheral.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© COPYRIGHT 2014 STMicroelectronics</center></h2>
|
||||
*
|
||||
* Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
|
||||
* You may not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at:
|
||||
*
|
||||
* http://www.st.com/software_license_agreement_liberty_v2
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an "AS IS" BASIS,
|
||||
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
/* Define to prevent recursive inclusion -------------------------------------*/
|
||||
#ifndef __STM8S_FLASH_H
|
||||
#define __STM8S_FLASH_H
|
||||
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
#include "stm8s.h"
|
||||
|
||||
/* Exported constants --------------------------------------------------------*/
|
||||
|
||||
/** @addtogroup FLASH_Exported_Constants
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define FLASH_PROG_START_PHYSICAL_ADDRESS ((uint32_t)0x008000) /*!< Program memory: start address */
|
||||
|
||||
#if defined (STM8S208) || defined(STM8S207) || defined(STM8S007) || defined (STM8AF52Ax) || defined (STM8AF62Ax)
|
||||
#define FLASH_PROG_END_PHYSICAL_ADDRESS ((uint32_t)0x027FFF) /*!< Program memory: end address */
|
||||
#define FLASH_PROG_BLOCKS_NUMBER ((uint16_t)1024) /*!< Program memory: total number of blocks */
|
||||
#define FLASH_DATA_START_PHYSICAL_ADDRESS ((uint32_t)0x004000) /*!< Data EEPROM memory: start address */
|
||||
#define FLASH_DATA_END_PHYSICAL_ADDRESS ((uint32_t)0x0047FF) /*!< Data EEPROM memory: end address */
|
||||
#define FLASH_DATA_BLOCKS_NUMBER ((uint16_t)16) /*!< Data EEPROM memory: total number of blocks */
|
||||
#define FLASH_BLOCK_SIZE ((uint8_t)128) /*!< Number of bytes in a block (common for Program and Data memories) */
|
||||
#endif /* STM8S208, STM8S207, STM8S007, STM8AF52Ax, STM8AF62Ax */
|
||||
|
||||
#if defined(STM8S105) || defined(STM8S005) || defined(STM8AF626x)
|
||||
#define FLASH_PROG_END_PHYSICAL_ADDRESS ((uint32_t)0xFFFF) /*!< Program memory: end address */
|
||||
#define FLASH_PROG_BLOCKS_NUMBER ((uint16_t)256) /*!< Program memory: total number of blocks */
|
||||
#define FLASH_DATA_START_PHYSICAL_ADDRESS ((uint32_t)0x004000) /*!< Data EEPROM memory: start address */
|
||||
#define FLASH_DATA_END_PHYSICAL_ADDRESS ((uint32_t)0x0043FF) /*!< Data EEPROM memory: end address */
|
||||
#define FLASH_DATA_BLOCKS_NUMBER ((uint16_t)8) /*!< Data EEPROM memory: total number of blocks */
|
||||
#define FLASH_BLOCK_SIZE ((uint8_t)128) /*!< Number of bytes in a block (common for Program and Data memories) */
|
||||
#endif /* STM8S105 or STM8AF626x */
|
||||
|
||||
#if defined(STM8S103) || defined(STM8S003) || defined(STM8S001) || defined(STM8S903) || defined(STM8AF622x)
|
||||
#define FLASH_PROG_END_PHYSICAL_ADDRESS ((uint32_t)0x9FFF) /*!< Program memory: end address */
|
||||
#define FLASH_PROG_BLOCKS_NUMBER ((uint16_t)128) /*!< Program memory: total number of blocks */
|
||||
#define FLASH_DATA_START_PHYSICAL_ADDRESS ((uint32_t)0x004000) /*!< Data EEPROM memory: start address */
|
||||
#define FLASH_DATA_END_PHYSICAL_ADDRESS ((uint32_t)0x00427F) /*!< Data EEPROM memory: end address */
|
||||
#define FLASH_DATA_BLOCKS_NUMBER ((uint16_t)10) /*!< Data EEPROM memory: total number of blocks */
|
||||
#define FLASH_BLOCK_SIZE ((uint8_t)64) /*!< Number of bytes in a block (common for Program and Data memories) */
|
||||
#endif /* STM8S103 or STM8S003 or STM8S001 or STM8S903 or STM8AF622x*/
|
||||
|
||||
#define FLASH_RASS_KEY1 ((uint8_t)0x56) /*!< First RASS key */
|
||||
#define FLASH_RASS_KEY2 ((uint8_t)0xAE) /*!< Second RASS key */
|
||||
|
||||
#define OPTION_BYTE_START_PHYSICAL_ADDRESS ((uint16_t)0x4800)
|
||||
#define OPTION_BYTE_END_PHYSICAL_ADDRESS ((uint16_t)0x487F)
|
||||
#define FLASH_OPTIONBYTE_ERROR ((uint16_t)0x5555) /*!< Error code option byte
|
||||
(if value read is not equal to complement value read) */
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/* Exported types ------------------------------------------------------------*/
|
||||
|
||||
/** @addtogroup FLASH_Exported_Types
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @brief FLASH Memory types
|
||||
*/
|
||||
typedef enum {
|
||||
FLASH_MEMTYPE_PROG = (uint8_t)0xFD, /*!< Program memory */
|
||||
FLASH_MEMTYPE_DATA = (uint8_t)0xF7 /*!< Data EEPROM memory */
|
||||
} FLASH_MemType_TypeDef;
|
||||
|
||||
/**
|
||||
* @brief FLASH programming modes
|
||||
*/
|
||||
typedef enum {
|
||||
FLASH_PROGRAMMODE_STANDARD = (uint8_t)0x00, /*!< Standard programming mode */
|
||||
FLASH_PROGRAMMODE_FAST = (uint8_t)0x10 /*!< Fast programming mode */
|
||||
} FLASH_ProgramMode_TypeDef;
|
||||
|
||||
/**
|
||||
* @brief FLASH fixed programming time
|
||||
*/
|
||||
typedef enum {
|
||||
FLASH_PROGRAMTIME_STANDARD = (uint8_t)0x00, /*!< Standard programming time fixed at 1/2 tprog */
|
||||
FLASH_PROGRAMTIME_TPROG = (uint8_t)0x01 /*!< Programming time fixed at tprog */
|
||||
} FLASH_ProgramTime_TypeDef;
|
||||
|
||||
/**
|
||||
* @brief FLASH Low Power mode select
|
||||
*/
|
||||
typedef enum {
|
||||
FLASH_LPMODE_POWERDOWN = (uint8_t)0x04, /*!< HALT: Power-Down / ACTIVE-HALT: Power-Down */
|
||||
FLASH_LPMODE_STANDBY = (uint8_t)0x08, /*!< HALT: Standby / ACTIVE-HALT: Standby */
|
||||
FLASH_LPMODE_POWERDOWN_STANDBY = (uint8_t)0x00, /*!< HALT: Power-Down / ACTIVE-HALT: Standby */
|
||||
FLASH_LPMODE_STANDBY_POWERDOWN = (uint8_t)0x0C /*!< HALT: Standby / ACTIVE-HALT: Power-Down */
|
||||
}
|
||||
FLASH_LPMode_TypeDef;
|
||||
|
||||
/**
|
||||
* @brief FLASH status of the last operation
|
||||
*/
|
||||
typedef enum {
|
||||
#if defined (STM8S208) || defined(STM8S207) || defined(STM8S007) || defined(STM8S105) || \
|
||||
defined(STM8S005) || defined (STM8AF52Ax) || defined (STM8AF62Ax) || defined(STM8AF626x)
|
||||
FLASH_STATUS_END_HIGH_VOLTAGE = (uint8_t)0x40, /*!< End of high voltage */
|
||||
#endif /* STM8S208, STM8S207, STM8S105, STM8AF62Ax, STM8AF52Ax, STM8AF626x */
|
||||
FLASH_STATUS_SUCCESSFUL_OPERATION = (uint8_t)0x04, /*!< End of operation flag */
|
||||
FLASH_STATUS_TIMEOUT = (uint8_t)0x02, /*!< Time out error */
|
||||
FLASH_STATUS_WRITE_PROTECTION_ERROR = (uint8_t)0x01 /*!< Write attempted to protected page */
|
||||
} FLASH_Status_TypeDef;
|
||||
|
||||
/**
|
||||
* @brief FLASH flags definition
|
||||
* - Warning : FLAG value = mapping position register
|
||||
*/
|
||||
typedef enum {
|
||||
#if defined (STM8S208) || defined(STM8S207) || defined(STM8S007) || defined(STM8S105) || \
|
||||
defined(STM8S005) || defined (STM8AF52Ax) || defined (STM8AF62Ax) || defined(STM8AF626x)
|
||||
FLASH_FLAG_HVOFF = (uint8_t)0x40, /*!< End of high voltage flag */
|
||||
#endif /* STM8S208, STM8S207, STM8S105, STM8AF62Ax, STM8AF52Ax, STM8AF626x */
|
||||
FLASH_FLAG_DUL = (uint8_t)0x08, /*!< Data EEPROM unlocked flag */
|
||||
FLASH_FLAG_EOP = (uint8_t)0x04, /*!< End of programming (write or erase operation) flag */
|
||||
FLASH_FLAG_PUL = (uint8_t)0x02, /*!< Flash Program memory unlocked flag */
|
||||
FLASH_FLAG_WR_PG_DIS = (uint8_t)0x01 /*!< Write attempted to protected page flag */
|
||||
} FLASH_Flag_TypeDef;
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/* Private macros ------------------------------------------------------------*/
|
||||
|
||||
/**
|
||||
* @brief Macros used by the assert function in order to check the different functions parameters.
|
||||
* @addtogroup FLASH_Private_Macros
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @brief Macro used by the assert function in order to check the different sensitivity values for the flash program Address
|
||||
*/
|
||||
|
||||
#define IS_FLASH_PROG_ADDRESS_OK(ADDRESS) (((ADDRESS) >= FLASH_PROG_START_PHYSICAL_ADDRESS) && \
|
||||
((ADDRESS) <= FLASH_PROG_END_PHYSICAL_ADDRESS))
|
||||
|
||||
/**
|
||||
* @brief Macro used by the assert function in order to check the different sensitivity values for the data eeprom Address
|
||||
*/
|
||||
|
||||
#define IS_FLASH_DATA_ADDRESS_OK(ADDRESS) (((ADDRESS) >= FLASH_DATA_START_PHYSICAL_ADDRESS) && \
|
||||
((ADDRESS) <= FLASH_DATA_END_PHYSICAL_ADDRESS))
|
||||
|
||||
/**
|
||||
* @brief Macro used by the assert function in order to check the different sensitivity values for the data eeprom and flash program Address
|
||||
*/
|
||||
#define IS_FLASH_ADDRESS_OK(ADDRESS)((((ADDRESS) >= FLASH_PROG_START_PHYSICAL_ADDRESS) && ((ADDRESS) <= FLASH_PROG_END_PHYSICAL_ADDRESS)) || \
|
||||
(((ADDRESS) >= FLASH_DATA_START_PHYSICAL_ADDRESS) && ((ADDRESS) <= FLASH_DATA_END_PHYSICAL_ADDRESS)))
|
||||
|
||||
/**
|
||||
* @brief Macro used by the assert function in order to check the different sensitivity values for the flash program Block number
|
||||
*/
|
||||
#define IS_FLASH_PROG_BLOCK_NUMBER_OK(BLOCKNUM) ((BLOCKNUM) < FLASH_PROG_BLOCKS_NUMBER)
|
||||
|
||||
/**
|
||||
* @brief Macro used by the assert function in order to check the different sensitivity values for the data eeprom Block number
|
||||
*/
|
||||
#define IS_FLASH_DATA_BLOCK_NUMBER_OK(BLOCKNUM) ((BLOCKNUM) < FLASH_DATA_BLOCKS_NUMBER)
|
||||
|
||||
/**
|
||||
* @brief Macro used by the assert function in order to check the different sensitivity values for the flash memory type
|
||||
*/
|
||||
|
||||
#define IS_MEMORY_TYPE_OK(MEMTYPE) (((MEMTYPE) == FLASH_MEMTYPE_PROG) || \
|
||||
((MEMTYPE) == FLASH_MEMTYPE_DATA))
|
||||
|
||||
/**
|
||||
* @brief Macro used by the assert function in order to check the different sensitivity values for the flash program mode
|
||||
*/
|
||||
|
||||
#define IS_FLASH_PROGRAM_MODE_OK(MODE) (((MODE) == FLASH_PROGRAMMODE_STANDARD) || \
|
||||
((MODE) == FLASH_PROGRAMMODE_FAST))
|
||||
|
||||
/**
|
||||
* @brief Macro used by the assert function in order to check the program time mode
|
||||
*/
|
||||
|
||||
#define IS_FLASH_PROGRAM_TIME_OK(TIME) (((TIME) == FLASH_PROGRAMTIME_STANDARD) || \
|
||||
((TIME) == FLASH_PROGRAMTIME_TPROG))
|
||||
|
||||
/**
|
||||
* @brief Macro used by the assert function in order to check the different
|
||||
* sensitivity values for the low power mode
|
||||
*/
|
||||
|
||||
#define IS_FLASH_LOW_POWER_MODE_OK(LPMODE) (((LPMODE) == FLASH_LPMODE_POWERDOWN) || \
|
||||
((LPMODE) == FLASH_LPMODE_STANDBY) || \
|
||||
((LPMODE) == FLASH_LPMODE_POWERDOWN_STANDBY) || \
|
||||
((LPMODE) == FLASH_LPMODE_STANDBY_POWERDOWN))
|
||||
|
||||
/**
|
||||
* @brief Macro used by the assert function in order to check the different
|
||||
* sensitivity values for the option bytes Address
|
||||
*/
|
||||
#define IS_OPTION_BYTE_ADDRESS_OK(ADDRESS) (((ADDRESS) >= OPTION_BYTE_START_PHYSICAL_ADDRESS) && \
|
||||
((ADDRESS) <= OPTION_BYTE_END_PHYSICAL_ADDRESS))
|
||||
|
||||
|
||||
/**
|
||||
* @brief Macro used by the assert function in order to check the different flags values
|
||||
*/
|
||||
#if defined (STM8S208) || defined(STM8S207) || defined(STM8S007) || defined(STM8S105) || \
|
||||
defined(STM8S005) || defined (STM8AF52Ax) || defined (STM8AF62Ax) || defined(STM8AF626x)
|
||||
#define IS_FLASH_FLAGS_OK(FLAG) (((FLAG) == FLASH_FLAG_HVOFF) || \
|
||||
((FLAG) == FLASH_FLAG_DUL) || \
|
||||
((FLAG) == FLASH_FLAG_EOP) || \
|
||||
((FLAG) == FLASH_FLAG_PUL) || \
|
||||
((FLAG) == FLASH_FLAG_WR_PG_DIS))
|
||||
#else /* STM8S103, STM8S001, STM8S903, STM8AF622x */
|
||||
#define IS_FLASH_FLAGS_OK(FLAG) (((FLAG) == FLASH_FLAG_DUL) || \
|
||||
((FLAG) == FLASH_FLAG_EOP) || \
|
||||
((FLAG) == FLASH_FLAG_PUL) || \
|
||||
((FLAG) == FLASH_FLAG_WR_PG_DIS))
|
||||
#endif /* STM8S208, STM8S207, STM8S105, STM8AF62Ax, STM8AF52Ax, STM8AF626x */
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/* Exported functions ------------------------------------------------------- */
|
||||
|
||||
/** @addtogroup FLASH_Exported_Functions
|
||||
* @{
|
||||
*/
|
||||
void FLASH_Unlock(FLASH_MemType_TypeDef FLASH_MemType);
|
||||
void FLASH_Lock(FLASH_MemType_TypeDef FLASH_MemType);
|
||||
void FLASH_DeInit(void);
|
||||
void FLASH_ITConfig(FunctionalState NewState);
|
||||
void FLASH_EraseByte(uint32_t Address);
|
||||
void FLASH_ProgramByte(uint32_t Address, uint8_t Data);
|
||||
uint8_t FLASH_ReadByte(uint32_t Address);
|
||||
void FLASH_ProgramWord(uint32_t Address, uint32_t Data);
|
||||
uint16_t FLASH_ReadOptionByte(uint16_t Address);
|
||||
void FLASH_ProgramOptionByte(uint16_t Address, uint8_t Data);
|
||||
void FLASH_EraseOptionByte(uint16_t Address);
|
||||
void FLASH_SetLowPowerMode(FLASH_LPMode_TypeDef FLASH_LPMode);
|
||||
void FLASH_SetProgrammingTime(FLASH_ProgramTime_TypeDef FLASH_ProgTime);
|
||||
FLASH_LPMode_TypeDef FLASH_GetLowPowerMode(void);
|
||||
FLASH_ProgramTime_TypeDef FLASH_GetProgrammingTime(void);
|
||||
uint32_t FLASH_GetBootSize(void);
|
||||
FlagStatus FLASH_GetFlagStatus(FLASH_Flag_TypeDef FLASH_FLAG);
|
||||
|
||||
/**
|
||||
@code
|
||||
All the functions declared below must be executed from RAM exclusively, except
|
||||
for the FLASH_WaitForLastOperation function which can be executed from Flash.
|
||||
|
||||
Steps of the execution from RAM differs from one toolchain to another.
|
||||
for more details refer to stm8s_flash.c file.
|
||||
|
||||
To enable execution from RAM you can either uncomment the following define
|
||||
in the stm8s.h file or define it in your toolchain compiler preprocessor
|
||||
- #define RAM_EXECUTION (1)
|
||||
|
||||
@endcode
|
||||
*/
|
||||
IN_RAM(void FLASH_EraseBlock(uint16_t BlockNum, FLASH_MemType_TypeDef FLASH_MemType));
|
||||
IN_RAM(void FLASH_ProgramBlock(uint16_t BlockNum, FLASH_MemType_TypeDef FLASH_MemType,
|
||||
FLASH_ProgramMode_TypeDef FLASH_ProgMode, uint8_t *Buffer));
|
||||
IN_RAM(FLASH_Status_TypeDef FLASH_WaitForLastOperation(FLASH_MemType_TypeDef FLASH_MemType));
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
#endif /*__STM8S_FLASH_H */
|
||||
|
||||
|
||||
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
|
||||
156
Serial/inc/stm8s_gpio.h
Normal file
156
Serial/inc/stm8s_gpio.h
Normal file
@@ -0,0 +1,156 @@
|
||||
/**
|
||||
******************************************************************************
|
||||
* @file stm8s_gpio.h
|
||||
* @author MCD Application Team
|
||||
* @version V2.3.0
|
||||
* @date 16-June-2017
|
||||
* @brief This file contains all functions prototype and macros for the GPIO peripheral.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© COPYRIGHT 2014 STMicroelectronics</center></h2>
|
||||
*
|
||||
* Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
|
||||
* You may not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at:
|
||||
*
|
||||
* http://www.st.com/software_license_agreement_liberty_v2
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an "AS IS" BASIS,
|
||||
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
/* Define to prevent recursive inclusion -------------------------------------*/
|
||||
#ifndef __STM8S_GPIO_H
|
||||
#define __STM8S_GPIO_H
|
||||
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
#include "stm8s.h"
|
||||
|
||||
/* Exported variables ------------------------------------------------------- */
|
||||
/* Exported types ------------------------------------------------------------*/
|
||||
|
||||
/** @addtogroup GPIO_Exported_Types
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @brief GPIO modes
|
||||
*
|
||||
* Bits definitions:
|
||||
* - Bit 7: 0 = INPUT mode
|
||||
* 1 = OUTPUT mode
|
||||
* 1 = PULL-UP (input) or PUSH-PULL (output)
|
||||
* - Bit 5: 0 = No external interrupt (input) or No slope control (output)
|
||||
* 1 = External interrupt (input) or Slow control enabled (output)
|
||||
* - Bit 4: 0 = Low level (output)
|
||||
* 1 = High level (output push-pull) or HI-Z (output open-drain)
|
||||
*/
|
||||
typedef enum
|
||||
{
|
||||
GPIO_MODE_IN_FL_NO_IT = (uint8_t)0x00, /*!< Input floating, no external interrupt */
|
||||
GPIO_MODE_IN_PU_NO_IT = (uint8_t)0x40, /*!< Input pull-up, no external interrupt */
|
||||
GPIO_MODE_IN_FL_IT = (uint8_t)0x20, /*!< Input floating, external interrupt */
|
||||
GPIO_MODE_IN_PU_IT = (uint8_t)0x60, /*!< Input pull-up, external interrupt */
|
||||
GPIO_MODE_OUT_OD_LOW_FAST = (uint8_t)0xA0, /*!< Output open-drain, low level, 10MHz */
|
||||
GPIO_MODE_OUT_PP_LOW_FAST = (uint8_t)0xE0, /*!< Output push-pull, low level, 10MHz */
|
||||
GPIO_MODE_OUT_OD_LOW_SLOW = (uint8_t)0x80, /*!< Output open-drain, low level, 2MHz */
|
||||
GPIO_MODE_OUT_PP_LOW_SLOW = (uint8_t)0xC0, /*!< Output push-pull, low level, 2MHz */
|
||||
GPIO_MODE_OUT_OD_HIZ_FAST = (uint8_t)0xB0, /*!< Output open-drain, high-impedance level,10MHz */
|
||||
GPIO_MODE_OUT_PP_HIGH_FAST = (uint8_t)0xF0, /*!< Output push-pull, high level, 10MHz */
|
||||
GPIO_MODE_OUT_OD_HIZ_SLOW = (uint8_t)0x90, /*!< Output open-drain, high-impedance level, 2MHz */
|
||||
GPIO_MODE_OUT_PP_HIGH_SLOW = (uint8_t)0xD0 /*!< Output push-pull, high level, 2MHz */
|
||||
}GPIO_Mode_TypeDef;
|
||||
|
||||
/**
|
||||
* @brief Definition of the GPIO pins. Used by the @ref GPIO_Init function in
|
||||
* order to select the pins to be initialized.
|
||||
*/
|
||||
|
||||
typedef enum
|
||||
{
|
||||
GPIO_PIN_0 = ((uint8_t)0x01), /*!< Pin 0 selected */
|
||||
GPIO_PIN_1 = ((uint8_t)0x02), /*!< Pin 1 selected */
|
||||
GPIO_PIN_2 = ((uint8_t)0x04), /*!< Pin 2 selected */
|
||||
GPIO_PIN_3 = ((uint8_t)0x08), /*!< Pin 3 selected */
|
||||
GPIO_PIN_4 = ((uint8_t)0x10), /*!< Pin 4 selected */
|
||||
GPIO_PIN_5 = ((uint8_t)0x20), /*!< Pin 5 selected */
|
||||
GPIO_PIN_6 = ((uint8_t)0x40), /*!< Pin 6 selected */
|
||||
GPIO_PIN_7 = ((uint8_t)0x80), /*!< Pin 7 selected */
|
||||
GPIO_PIN_LNIB = ((uint8_t)0x0F), /*!< Low nibble pins selected */
|
||||
GPIO_PIN_HNIB = ((uint8_t)0xF0), /*!< High nibble pins selected */
|
||||
GPIO_PIN_ALL = ((uint8_t)0xFF) /*!< All pins selected */
|
||||
}GPIO_Pin_TypeDef;
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/* Exported constants --------------------------------------------------------*/
|
||||
/* Exported macros -----------------------------------------------------------*/
|
||||
/* Private macros ------------------------------------------------------------*/
|
||||
|
||||
/** @addtogroup GPIO_Private_Macros
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @brief Macro used by the assert function to check the different functions parameters.
|
||||
*/
|
||||
|
||||
/**
|
||||
* @brief Macro used by the assert function in order to check the different
|
||||
* values of GPIOMode_TypeDef.
|
||||
*/
|
||||
#define IS_GPIO_MODE_OK(MODE) \
|
||||
(((MODE) == GPIO_MODE_IN_FL_NO_IT) || \
|
||||
((MODE) == GPIO_MODE_IN_PU_NO_IT) || \
|
||||
((MODE) == GPIO_MODE_IN_FL_IT) || \
|
||||
((MODE) == GPIO_MODE_IN_PU_IT) || \
|
||||
((MODE) == GPIO_MODE_OUT_OD_LOW_FAST) || \
|
||||
((MODE) == GPIO_MODE_OUT_PP_LOW_FAST) || \
|
||||
((MODE) == GPIO_MODE_OUT_OD_LOW_SLOW) || \
|
||||
((MODE) == GPIO_MODE_OUT_PP_LOW_SLOW) || \
|
||||
((MODE) == GPIO_MODE_OUT_OD_HIZ_FAST) || \
|
||||
((MODE) == GPIO_MODE_OUT_PP_HIGH_FAST) || \
|
||||
((MODE) == GPIO_MODE_OUT_OD_HIZ_SLOW) || \
|
||||
((MODE) == GPIO_MODE_OUT_PP_HIGH_SLOW))
|
||||
|
||||
/**
|
||||
* @brief Macro used by the assert function in order to check the different
|
||||
* values of GPIO_Pins.
|
||||
*/
|
||||
#define IS_GPIO_PIN_OK(PIN) ((PIN) != (uint8_t)0x00)
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/* Exported functions ------------------------------------------------------- */
|
||||
/** @addtogroup GPIO_Exported_Functions
|
||||
* @{
|
||||
*/
|
||||
|
||||
void GPIO_DeInit(GPIO_TypeDef* GPIOx);
|
||||
void GPIO_Init(GPIO_TypeDef* GPIOx, GPIO_Pin_TypeDef GPIO_Pin, GPIO_Mode_TypeDef GPIO_Mode);
|
||||
void GPIO_Write(GPIO_TypeDef* GPIOx, uint8_t PortVal);
|
||||
void GPIO_WriteHigh(GPIO_TypeDef* GPIOx, GPIO_Pin_TypeDef PortPins);
|
||||
void GPIO_WriteLow(GPIO_TypeDef* GPIOx, GPIO_Pin_TypeDef PortPins);
|
||||
void GPIO_WriteReverse(GPIO_TypeDef* GPIOx, GPIO_Pin_TypeDef PortPins);
|
||||
uint8_t GPIO_ReadInputData(GPIO_TypeDef* GPIOx);
|
||||
uint8_t GPIO_ReadOutputData(GPIO_TypeDef* GPIOx);
|
||||
BitStatus GPIO_ReadInputPin(GPIO_TypeDef* GPIOx, GPIO_Pin_TypeDef GPIO_Pin);
|
||||
void GPIO_ExternalPullUpConfig(GPIO_TypeDef* GPIOx, GPIO_Pin_TypeDef GPIO_Pin, FunctionalState NewState);
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
#endif /* __STM8L_GPIO_H */
|
||||
|
||||
|
||||
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
|
||||
632
Serial/inc/stm8s_i2c.h
Normal file
632
Serial/inc/stm8s_i2c.h
Normal file
@@ -0,0 +1,632 @@
|
||||
/**
|
||||
******************************************************************************
|
||||
* @file stm8s_i2c.h
|
||||
* @author MCD Application Team
|
||||
* @version V2.3.0
|
||||
* @date 16-June-2017
|
||||
* @brief This file contains all functions prototype and macros for the I2C peripheral.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© COPYRIGHT 2014 STMicroelectronics</center></h2>
|
||||
*
|
||||
* Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
|
||||
* You may not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at:
|
||||
*
|
||||
* http://www.st.com/software_license_agreement_liberty_v2
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an "AS IS" BASIS,
|
||||
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
/* Define to prevent recursive inclusion -------------------------------------*/
|
||||
#ifndef __STM8S_I2C_H
|
||||
#define __STM8S_I2C_H
|
||||
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
#include "stm8s.h"
|
||||
|
||||
/* Exported types ------------------------------------------------------------*/
|
||||
|
||||
/** @addtogroup I2C_Exported_Types
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @brief I2C duty cycle (fast mode only)
|
||||
*/
|
||||
typedef enum
|
||||
{
|
||||
I2C_DUTYCYCLE_2 = (uint8_t)0x00, /*!< Fast mode Tlow/THigh = 2 */
|
||||
I2C_DUTYCYCLE_16_9 = (uint8_t)0x40 /*!< Fast mode Tlow/Thigh = 16/9 */
|
||||
} I2C_DutyCycle_TypeDef;
|
||||
|
||||
/**
|
||||
* @brief I2C Acknowledgement configuration
|
||||
*/
|
||||
typedef enum
|
||||
{
|
||||
I2C_ACK_NONE = (uint8_t)0x00, /*!< No acknowledge */
|
||||
I2C_ACK_CURR = (uint8_t)0x01, /*!< Acknowledge on the current byte */
|
||||
I2C_ACK_NEXT = (uint8_t)0x02 /*!< Acknowledge on the next byte */
|
||||
} I2C_Ack_TypeDef;
|
||||
|
||||
/**
|
||||
* @brief I2C Addressing Mode (slave mode only)
|
||||
*/
|
||||
typedef enum
|
||||
{
|
||||
I2C_ADDMODE_7BIT = (uint8_t)0x00, /*!< 7-bit slave address (10-bit address not acknowledged) */
|
||||
I2C_ADDMODE_10BIT = (uint8_t)0x80 /*!< 10-bit slave address (7-bit address not acknowledged) */
|
||||
} I2C_AddMode_TypeDef;
|
||||
|
||||
/**
|
||||
* @brief I2C Interrupt sources
|
||||
* Warning: the values correspond to the bit position in the ITR register
|
||||
*/
|
||||
typedef enum
|
||||
{
|
||||
I2C_IT_ERR = (uint8_t)0x01, /*!< Error Interruption */
|
||||
I2C_IT_EVT = (uint8_t)0x02, /*!< Event Interruption */
|
||||
I2C_IT_BUF = (uint8_t)0x04 /*!< Buffer Interruption */
|
||||
} I2C_IT_TypeDef;
|
||||
|
||||
/**
|
||||
* @brief I2C transfer direction
|
||||
* Warning: the values correspond to the ADD0 bit position in the OARL register
|
||||
*/
|
||||
typedef enum
|
||||
{
|
||||
I2C_DIRECTION_TX = (uint8_t)0x00, /*!< Transmission direction */
|
||||
I2C_DIRECTION_RX = (uint8_t)0x01 /*!< Reception direction */
|
||||
} I2C_Direction_TypeDef;
|
||||
|
||||
/**
|
||||
* @brief I2C Flags
|
||||
* @brief Elements values convention: 0xXXYY
|
||||
* X = SRx registers index
|
||||
* X = 1 : SR1
|
||||
* X = 2 : SR2
|
||||
* X = 3 : SR3
|
||||
* Y = Flag mask in the register
|
||||
*/
|
||||
|
||||
typedef enum
|
||||
{
|
||||
/* SR1 register flags */
|
||||
I2C_FLAG_TXEMPTY = (uint16_t)0x0180, /*!< Transmit Data Register Empty flag */
|
||||
I2C_FLAG_RXNOTEMPTY = (uint16_t)0x0140, /*!< Read Data Register Not Empty flag */
|
||||
I2C_FLAG_STOPDETECTION = (uint16_t)0x0110, /*!< Stop detected flag */
|
||||
I2C_FLAG_HEADERSENT = (uint16_t)0x0108, /*!< 10-bit Header sent flag */
|
||||
I2C_FLAG_TRANSFERFINISHED = (uint16_t)0x0104, /*!< Data Byte Transfer Finished flag */
|
||||
I2C_FLAG_ADDRESSSENTMATCHED = (uint16_t)0x0102, /*!< Address Sent/Matched (master/slave) flag */
|
||||
I2C_FLAG_STARTDETECTION = (uint16_t)0x0101, /*!< Start bit sent flag */
|
||||
|
||||
/* SR2 register flags */
|
||||
I2C_FLAG_WAKEUPFROMHALT = (uint16_t)0x0220, /*!< Wake Up From Halt Flag */
|
||||
I2C_FLAG_OVERRUNUNDERRUN = (uint16_t)0x0208, /*!< Overrun/Underrun flag */
|
||||
I2C_FLAG_ACKNOWLEDGEFAILURE = (uint16_t)0x0204, /*!< Acknowledge Failure Flag */
|
||||
I2C_FLAG_ARBITRATIONLOSS = (uint16_t)0x0202, /*!< Arbitration Loss Flag */
|
||||
I2C_FLAG_BUSERROR = (uint16_t)0x0201, /*!< Misplaced Start or Stop condition */
|
||||
|
||||
/* SR3 register flags */
|
||||
I2C_FLAG_GENERALCALL = (uint16_t)0x0310, /*!< General Call header received Flag */
|
||||
I2C_FLAG_TRANSMITTERRECEIVER = (uint16_t)0x0304, /*!< Transmitter Receiver Flag */
|
||||
I2C_FLAG_BUSBUSY = (uint16_t)0x0302, /*!< Bus Busy Flag */
|
||||
I2C_FLAG_MASTERSLAVE = (uint16_t)0x0301 /*!< Master Slave Flag */
|
||||
} I2C_Flag_TypeDef;
|
||||
|
||||
/**
|
||||
* @brief I2C Pending bits
|
||||
* Elements values convention: 0xXYZZ
|
||||
* X = SRx registers index
|
||||
* X = 1 : SR1
|
||||
* X = 2 : SR2
|
||||
* Y = Position of the corresponding Interrupt
|
||||
* ZZ = flag mask in the dedicated register(X register)
|
||||
*/
|
||||
|
||||
typedef enum
|
||||
{
|
||||
/* SR1 register flags */
|
||||
I2C_ITPENDINGBIT_TXEMPTY = (uint16_t)0x1680, /*!< Transmit Data Register Empty */
|
||||
I2C_ITPENDINGBIT_RXNOTEMPTY = (uint16_t)0x1640, /*!< Read Data Register Not Empty */
|
||||
I2C_ITPENDINGBIT_STOPDETECTION = (uint16_t)0x1210, /*!< Stop detected */
|
||||
I2C_ITPENDINGBIT_HEADERSENT = (uint16_t)0x1208, /*!< 10-bit Header sent */
|
||||
I2C_ITPENDINGBIT_TRANSFERFINISHED = (uint16_t)0x1204, /*!< Data Byte Transfer Finished */
|
||||
I2C_ITPENDINGBIT_ADDRESSSENTMATCHED = (uint16_t)0x1202, /*!< Address Sent/Matched (master/slave) */
|
||||
I2C_ITPENDINGBIT_STARTDETECTION = (uint16_t)0x1201, /*!< Start bit sent */
|
||||
|
||||
/* SR2 register flags */
|
||||
I2C_ITPENDINGBIT_WAKEUPFROMHALT = (uint16_t)0x2220, /*!< Wake Up From Halt */
|
||||
I2C_ITPENDINGBIT_OVERRUNUNDERRUN = (uint16_t)0x2108, /*!< Overrun/Underrun */
|
||||
I2C_ITPENDINGBIT_ACKNOWLEDGEFAILURE = (uint16_t)0x2104, /*!< Acknowledge Failure */
|
||||
I2C_ITPENDINGBIT_ARBITRATIONLOSS = (uint16_t)0x2102, /*!< Arbitration Loss */
|
||||
I2C_ITPENDINGBIT_BUSERROR = (uint16_t)0x2101 /*!< Misplaced Start or Stop condition */
|
||||
} I2C_ITPendingBit_TypeDef;
|
||||
|
||||
/**
|
||||
* @brief I2C possible events
|
||||
* Values convention: 0xXXYY
|
||||
* XX = Event SR3 corresponding value
|
||||
* YY = Event SR1 corresponding value
|
||||
* @note if Event = EV3_2 the rule above does not apply
|
||||
* YY = Event SR2 corresponding value
|
||||
*/
|
||||
|
||||
typedef enum
|
||||
{
|
||||
/*========================================
|
||||
|
||||
I2C Master Events (Events grouped in order of communication)
|
||||
==========================================*/
|
||||
/**
|
||||
* @brief Communication start
|
||||
*
|
||||
* After sending the START condition (I2C_GenerateSTART() function) the master
|
||||
* has to wait for this event. It means that the Start condition has been correctly
|
||||
* released on the I2C bus (the bus is free, no other devices is communicating).
|
||||
*
|
||||
*/
|
||||
/* --EV5 */
|
||||
I2C_EVENT_MASTER_MODE_SELECT = (uint16_t)0x0301, /*!< BUSY, MSL and SB flag */
|
||||
|
||||
/**
|
||||
* @brief Address Acknowledge
|
||||
*
|
||||
* After checking on EV5 (start condition correctly released on the bus), the
|
||||
* master sends the address of the slave(s) with which it will communicate
|
||||
* (I2C_Send7bitAddress() function, it also determines the direction of the communication:
|
||||
* Master transmitter or Receiver).
|
||||
* Then the master has to wait that a slave acknowledges his address.
|
||||
* If an acknowledge is sent on the bus, one of the following events will
|
||||
* be set:
|
||||
*
|
||||
* 1) In case of Master Receiver (7-bit addressing):
|
||||
* the I2C_EVENT_MASTER_RECEIVER_MODE_SELECTED event is set.
|
||||
*
|
||||
* 2) In case of Master Transmitter (7-bit addressing):
|
||||
* the I2C_EVENT_MASTER_TRANSMITTER_MODE_SELECTED is set
|
||||
*
|
||||
* 3) In case of 10-Bit addressing mode, the master (just after generating the START
|
||||
* and checking on EV5) has to send the header of 10-bit addressing mode (I2C_SendData()
|
||||
* function).
|
||||
* Then master should wait on EV9. It means that the 10-bit addressing
|
||||
* header has been correctly sent on the bus.
|
||||
* Then master should send the second part of the 10-bit address (LSB) using
|
||||
* the function I2C_Send7bitAddress(). Then master should wait for event EV6.
|
||||
*
|
||||
*/
|
||||
/* --EV6 */
|
||||
I2C_EVENT_MASTER_TRANSMITTER_MODE_SELECTED = (uint16_t)0x0782, /*!< BUSY, MSL, ADDR, TXE and TRA flags */
|
||||
I2C_EVENT_MASTER_RECEIVER_MODE_SELECTED = (uint16_t)0x0302, /*!< BUSY, MSL and ADDR flags */
|
||||
/* --EV9 */
|
||||
I2C_EVENT_MASTER_MODE_ADDRESS10 = (uint16_t)0x0308, /*!< BUSY, MSL and ADD10 flags */
|
||||
|
||||
/**
|
||||
* @brief Communication events
|
||||
*
|
||||
* If a communication is established (START condition generated and slave address
|
||||
* acknowledged) then the master has to check on one of the following events for
|
||||
* communication procedures:
|
||||
*
|
||||
* 1) Master Receiver mode: The master has to wait on the event EV7 then to read
|
||||
* the data received from the slave (I2C_ReceiveData() function).
|
||||
*
|
||||
* 2) Master Transmitter mode: The master has to send data (I2C_SendData()
|
||||
* function) then to wait on event EV8 or EV8_2.
|
||||
* These two events are similar:
|
||||
* - EV8 means that the data has been written in the data register and is
|
||||
* being shifted out.
|
||||
* - EV8_2 means that the data has been physically shifted out and output
|
||||
* on the bus.
|
||||
* In most cases, using EV8 is sufficient for the application.
|
||||
* Using EV8_2 leads to a slower communication but ensures more reliable test.
|
||||
* EV8_2 is also more suitable than EV8 for testing on the last data transmission
|
||||
* (before Stop condition generation).
|
||||
*
|
||||
* @note In case the user software does not guarantee that this event EV7 is
|
||||
* managed before the current byte end of transfer, then user may check on EV7
|
||||
* and BTF flag at the same time (ie. (I2C_EVENT_MASTER_BYTE_RECEIVED | I2C_FLAG_BTF)).
|
||||
* In this case the communication may be slower.
|
||||
*
|
||||
*/
|
||||
/* Master RECEIVER mode -----------------------------*/
|
||||
/* --EV7 */
|
||||
I2C_EVENT_MASTER_BYTE_RECEIVED = (uint16_t)0x0340, /*!< BUSY, MSL and RXNE flags */
|
||||
|
||||
/* Master TRANSMITTER mode --------------------------*/
|
||||
/* --EV8 */
|
||||
I2C_EVENT_MASTER_BYTE_TRANSMITTING = (uint16_t)0x0780, /*!< TRA, BUSY, MSL, TXE flags */
|
||||
/* --EV8_2 */
|
||||
|
||||
I2C_EVENT_MASTER_BYTE_TRANSMITTED = (uint16_t)0x0784, /*!< EV8_2: TRA, BUSY, MSL, TXE and BTF flags */
|
||||
|
||||
|
||||
/*========================================
|
||||
|
||||
I2C Slave Events (Events grouped in order of communication)
|
||||
==========================================*/
|
||||
|
||||
/**
|
||||
* @brief Communication start events
|
||||
*
|
||||
* Wait on one of these events at the start of the communication. It means that
|
||||
* the I2C peripheral detected a Start condition on the bus (generated by master
|
||||
* device) followed by the peripheral address.
|
||||
* The peripheral generates an ACK condition on the bus (if the acknowledge
|
||||
* feature is enabled through function I2C_AcknowledgeConfig()) and the events
|
||||
* listed above are set :
|
||||
*
|
||||
* 1) In normal case (only one address managed by the slave), when the address
|
||||
* sent by the master matches the own address of the peripheral (configured by
|
||||
* I2C_OwnAddress1 field) the I2C_EVENT_SLAVE_XXX_ADDRESS_MATCHED event is set
|
||||
* (where XXX could be TRANSMITTER or RECEIVER).
|
||||
*
|
||||
* 2) In case the address sent by the master is General Call (address 0x00) and
|
||||
* if the General Call is enabled for the peripheral (using function I2C_GeneralCallCmd())
|
||||
* the following event is set I2C_EVENT_SLAVE_GENERALCALLADDRESS_MATCHED.
|
||||
*
|
||||
*/
|
||||
|
||||
/* --EV1 (all the events below are variants of EV1) */
|
||||
/* 1) Case of One Single Address managed by the slave */
|
||||
I2C_EVENT_SLAVE_RECEIVER_ADDRESS_MATCHED = (uint16_t)0x0202, /*!< BUSY and ADDR flags */
|
||||
I2C_EVENT_SLAVE_TRANSMITTER_ADDRESS_MATCHED = (uint16_t)0x0682, /*!< TRA, BUSY, TXE and ADDR flags */
|
||||
|
||||
/* 2) Case of General Call enabled for the slave */
|
||||
I2C_EVENT_SLAVE_GENERALCALLADDRESS_MATCHED = (uint16_t)0x1200, /*!< EV2: GENCALL and BUSY flags */
|
||||
|
||||
/**
|
||||
* @brief Communication events
|
||||
*
|
||||
* Wait on one of these events when EV1 has already been checked :
|
||||
*
|
||||
* - Slave RECEIVER mode:
|
||||
* - EV2: When the application is expecting a data byte to be received.
|
||||
* - EV4: When the application is expecting the end of the communication:
|
||||
* master sends a stop condition and data transmission is stopped.
|
||||
*
|
||||
* - Slave Transmitter mode:
|
||||
* - EV3: When a byte has been transmitted by the slave and the application
|
||||
* is expecting the end of the byte transmission.
|
||||
* The two events I2C_EVENT_SLAVE_BYTE_TRANSMITTED and I2C_EVENT_SLAVE_BYTE_TRANSMITTING
|
||||
* are similar. The second one can optionally be used when the user software
|
||||
* doesn't guarantee the EV3 is managed before the current byte end of transfer.
|
||||
* - EV3_2: When the master sends a NACK in order to tell slave that data transmission
|
||||
* shall end (before sending the STOP condition).
|
||||
* In this case slave has to stop sending data bytes and expect a Stop
|
||||
* condition on the bus.
|
||||
*
|
||||
* @note In case the user software does not guarantee that the event EV2 is
|
||||
* managed before the current byte end of transfer, then user may check on EV2
|
||||
* and BTF flag at the same time (ie. (I2C_EVENT_SLAVE_BYTE_RECEIVED | I2C_FLAG_BTF)).
|
||||
* In this case the communication may be slower.
|
||||
*
|
||||
*/
|
||||
/* Slave RECEIVER mode --------------------------*/
|
||||
/* --EV2 */
|
||||
I2C_EVENT_SLAVE_BYTE_RECEIVED = (uint16_t)0x0240, /*!< BUSY and RXNE flags */
|
||||
/* --EV4 */
|
||||
I2C_EVENT_SLAVE_STOP_DETECTED = (uint16_t)0x0010, /*!< STOPF flag */
|
||||
|
||||
/* Slave TRANSMITTER mode -----------------------*/
|
||||
/* --EV3 */
|
||||
I2C_EVENT_SLAVE_BYTE_TRANSMITTED = (uint16_t)0x0684, /*!< TRA, BUSY, TXE and BTF flags */
|
||||
I2C_EVENT_SLAVE_BYTE_TRANSMITTING = (uint16_t)0x0680, /*!< TRA, BUSY and TXE flags */
|
||||
/* --EV3_2 */
|
||||
I2C_EVENT_SLAVE_ACK_FAILURE = (uint16_t)0x0004 /*!< AF flag */
|
||||
} I2C_Event_TypeDef;
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/* Exported constants --------------------------------------------------------*/
|
||||
/** @addtogroup I2C_Exported_Constants
|
||||
* @{
|
||||
*/
|
||||
#define I2C_MAX_STANDARD_FREQ ((uint32_t)100000)
|
||||
#define I2C_MAX_FAST_FREQ ((uint32_t)400000)
|
||||
#if defined(STM8S208) || defined(STM8S207) || defined(STM8S007)
|
||||
#define I2C_MAX_INPUT_FREQ ((uint8_t)24)
|
||||
#else
|
||||
#define I2C_MAX_INPUT_FREQ ((uint8_t)16)
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/* Exported macros -----------------------------------------------------------*/
|
||||
/* Private macros ------------------------------------------------------------*/
|
||||
|
||||
/** @addtogroup I2C_Private_Macros
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @brief Macro used by the assert function to check the different functions parameters.
|
||||
*/
|
||||
|
||||
/**
|
||||
* @brief Macro used by the assert function to check the different I2C duty cycles.
|
||||
*/
|
||||
#define IS_I2C_DUTYCYCLE_OK(DUTY) \
|
||||
(((DUTY) == I2C_DUTYCYCLE_2) || \
|
||||
((DUTY) == I2C_DUTYCYCLE_16_9))
|
||||
|
||||
/**
|
||||
* @brief Macro used by the assert function to check the different acknowledgement configuration
|
||||
*/
|
||||
#define IS_I2C_ACK_OK(ACK) \
|
||||
(((ACK) == I2C_ACK_NONE) || \
|
||||
((ACK) == I2C_ACK_CURR) || \
|
||||
((ACK) == I2C_ACK_NEXT))
|
||||
|
||||
/**
|
||||
* @brief Macro used by the assert function to check the different I2C addressing modes.
|
||||
*/
|
||||
#define IS_I2C_ADDMODE_OK(ADDMODE) \
|
||||
(((ADDMODE) == I2C_ADDMODE_7BIT) || \
|
||||
((ADDMODE) == I2C_ADDMODE_10BIT))
|
||||
|
||||
/**
|
||||
* @brief Macro used by the assert function to check the different I2C interrupt types.
|
||||
*/
|
||||
#define IS_I2C_INTERRUPT_OK(IT) \
|
||||
(((IT) == I2C_IT_ERR) || \
|
||||
((IT) == I2C_IT_EVT) || \
|
||||
((IT) == I2C_IT_BUF) || \
|
||||
((IT) == (I2C_IT_ERR | I2C_IT_EVT)) || \
|
||||
((IT) == (I2C_IT_ERR | I2C_IT_BUF)) || \
|
||||
((IT) == (I2C_IT_EVT | I2C_IT_BUF)) || \
|
||||
((IT) == (I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR)))
|
||||
/**
|
||||
* @brief Macro used by the assert function to check the different I2C communcation direction.
|
||||
*/
|
||||
#define IS_I2C_DIRECTION_OK(DIR) \
|
||||
(((DIR) == I2C_DIRECTION_TX) || \
|
||||
((DIR) == I2C_DIRECTION_RX))
|
||||
|
||||
/**
|
||||
* @brief Macro used by the assert function to check the different I2C flags.
|
||||
*/
|
||||
#define IS_I2C_FLAG_OK(FLAG) \
|
||||
(((FLAG) == I2C_FLAG_TXEMPTY) || \
|
||||
((FLAG) == I2C_FLAG_RXNOTEMPTY) || \
|
||||
((FLAG) == I2C_FLAG_STOPDETECTION) || \
|
||||
((FLAG) == I2C_FLAG_HEADERSENT) || \
|
||||
((FLAG) == I2C_FLAG_TRANSFERFINISHED) || \
|
||||
((FLAG) == I2C_FLAG_ADDRESSSENTMATCHED) || \
|
||||
((FLAG) == I2C_FLAG_STARTDETECTION) || \
|
||||
((FLAG) == I2C_FLAG_WAKEUPFROMHALT) || \
|
||||
((FLAG) == I2C_FLAG_OVERRUNUNDERRUN) || \
|
||||
((FLAG) == I2C_FLAG_ACKNOWLEDGEFAILURE) || \
|
||||
((FLAG) == I2C_FLAG_ARBITRATIONLOSS) || \
|
||||
((FLAG) == I2C_FLAG_BUSERROR) || \
|
||||
((FLAG) == I2C_FLAG_GENERALCALL) || \
|
||||
((FLAG) == I2C_FLAG_TRANSMITTERRECEIVER) || \
|
||||
((FLAG) == I2C_FLAG_BUSBUSY) || \
|
||||
((FLAG) == I2C_FLAG_MASTERSLAVE))
|
||||
/**
|
||||
* @brief Macro used by the assert function to check the I2C flags to clear.
|
||||
*/
|
||||
|
||||
#define IS_I2C_CLEAR_FLAG_OK(FLAG) ((((uint16_t)(FLAG) & (uint16_t)0xFD00) == 0x00) \
|
||||
&& ((uint16_t)(FLAG) != 0x00))
|
||||
|
||||
/**
|
||||
* @brief Macro used by the assert function to check the different I2C possible pending bits.
|
||||
*/
|
||||
#define IS_I2C_ITPENDINGBIT_OK(ITPENDINGBIT) \
|
||||
(((ITPENDINGBIT) == I2C_ITPENDINGBIT_TXEMPTY) || \
|
||||
((ITPENDINGBIT) == I2C_ITPENDINGBIT_RXNOTEMPTY) || \
|
||||
((ITPENDINGBIT) == I2C_ITPENDINGBIT_STOPDETECTION) || \
|
||||
((ITPENDINGBIT) == I2C_ITPENDINGBIT_HEADERSENT) || \
|
||||
((ITPENDINGBIT) == I2C_ITPENDINGBIT_TRANSFERFINISHED) || \
|
||||
((ITPENDINGBIT) == I2C_ITPENDINGBIT_ADDRESSSENTMATCHED) || \
|
||||
((ITPENDINGBIT) == I2C_ITPENDINGBIT_STARTDETECTION) || \
|
||||
((ITPENDINGBIT) == I2C_ITPENDINGBIT_WAKEUPFROMHALT) || \
|
||||
((ITPENDINGBIT) == I2C_ITPENDINGBIT_OVERRUNUNDERRUN) || \
|
||||
((ITPENDINGBIT) == I2C_ITPENDINGBIT_ACKNOWLEDGEFAILURE) || \
|
||||
((ITPENDINGBIT) == I2C_ITPENDINGBIT_ARBITRATIONLOSS) || \
|
||||
((ITPENDINGBIT) == I2C_ITPENDINGBIT_BUSERROR))
|
||||
|
||||
/**
|
||||
* @brief Macro used by the assert function to check the different I2C possible
|
||||
* pending bits to clear by writing 0.
|
||||
*/
|
||||
#define IS_I2C_CLEAR_ITPENDINGBIT_OK(ITPENDINGBIT) \
|
||||
(((ITPENDINGBIT) == I2C_ITPENDINGBIT_WAKEUPFROMHALT) || \
|
||||
((ITPENDINGBIT) == I2C_ITPENDINGBIT_OVERRUNUNDERRUN) || \
|
||||
((ITPENDINGBIT) == I2C_ITPENDINGBIT_ACKNOWLEDGEFAILURE) || \
|
||||
((ITPENDINGBIT) == I2C_ITPENDINGBIT_ARBITRATIONLOSS) || \
|
||||
((ITPENDINGBIT) == I2C_ITPENDINGBIT_BUSERROR))
|
||||
|
||||
/**
|
||||
* @brief Macro used by the assert function to check the different I2C possible events.
|
||||
*/
|
||||
#define IS_I2C_EVENT_OK(EVENT) (((EVENT) == I2C_EVENT_SLAVE_TRANSMITTER_ADDRESS_MATCHED) || \
|
||||
((EVENT) == I2C_EVENT_SLAVE_RECEIVER_ADDRESS_MATCHED) || \
|
||||
((EVENT) == I2C_EVENT_SLAVE_GENERALCALLADDRESS_MATCHED) || \
|
||||
((EVENT) == I2C_EVENT_SLAVE_BYTE_RECEIVED) || \
|
||||
((EVENT) == (I2C_EVENT_SLAVE_BYTE_RECEIVED | (uint16_t)I2C_FLAG_GENERALCALL)) || \
|
||||
((EVENT) == I2C_EVENT_SLAVE_BYTE_TRANSMITTED) || \
|
||||
((EVENT) == (I2C_EVENT_SLAVE_BYTE_TRANSMITTED | (uint16_t)I2C_FLAG_GENERALCALL)) || \
|
||||
((EVENT) == I2C_EVENT_SLAVE_ACK_FAILURE) || \
|
||||
((EVENT) == I2C_EVENT_SLAVE_STOP_DETECTED) || \
|
||||
((EVENT) == I2C_EVENT_MASTER_MODE_SELECT) || \
|
||||
((EVENT) == I2C_EVENT_MASTER_TRANSMITTER_MODE_SELECTED) || \
|
||||
((EVENT) == I2C_EVENT_MASTER_RECEIVER_MODE_SELECTED) || \
|
||||
((EVENT) == I2C_EVENT_MASTER_BYTE_RECEIVED) || \
|
||||
((EVENT) == I2C_EVENT_MASTER_BYTE_TRANSMITTED) || \
|
||||
((EVENT) == I2C_EVENT_MASTER_BYTE_TRANSMITTING) || \
|
||||
((EVENT) == I2C_EVENT_MASTER_MODE_ADDRESS10))
|
||||
|
||||
/**
|
||||
* @brief Macro used by the assert function to check the different I2C possible own address.
|
||||
*/
|
||||
#define IS_I2C_OWN_ADDRESS_OK(ADDRESS) \
|
||||
((ADDRESS) <= (uint16_t)0x03FF)
|
||||
|
||||
/* The address must be even */
|
||||
#define IS_I2C_ADDRESS_OK(ADD) \
|
||||
(((ADD) & (uint8_t)0x01) == (uint8_t)0x00)
|
||||
|
||||
/**
|
||||
* @brief Macro used by the assert function to check that I2C Input clock frequency must be between 1MHz and 50MHz.
|
||||
*/
|
||||
#define IS_I2C_INPUT_CLOCK_FREQ_OK(FREQ) \
|
||||
(((FREQ) >= (uint8_t)1) && ((FREQ) <= I2C_MAX_INPUT_FREQ))
|
||||
|
||||
|
||||
/**
|
||||
* @brief Macro used by the assert function to check that I2C Output clock frequency must be between 1Hz and 400kHz.
|
||||
*/
|
||||
#define IS_I2C_OUTPUT_CLOCK_FREQ_OK(FREQ) \
|
||||
(((FREQ) >= (uint8_t)1) && ((FREQ) <= I2C_MAX_FAST_FREQ))
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/* Exported functions ------------------------------------------------------- */
|
||||
/** @addtogroup I2C_Exported_Functions
|
||||
* @{
|
||||
*/
|
||||
|
||||
void I2C_DeInit(void);
|
||||
void I2C_Init(uint32_t OutputClockFrequencyHz, uint16_t OwnAddress,
|
||||
I2C_DutyCycle_TypeDef I2C_DutyCycle, I2C_Ack_TypeDef Ack,
|
||||
I2C_AddMode_TypeDef AddMode, uint8_t InputClockFrequencyMHz );
|
||||
void I2C_Cmd(FunctionalState NewState);
|
||||
void I2C_GeneralCallCmd(FunctionalState NewState);
|
||||
void I2C_GenerateSTART(FunctionalState NewState);
|
||||
void I2C_GenerateSTOP(FunctionalState NewState);
|
||||
void I2C_SoftwareResetCmd(FunctionalState NewState);
|
||||
void I2C_StretchClockCmd(FunctionalState NewState);
|
||||
void I2C_AcknowledgeConfig(I2C_Ack_TypeDef Ack);
|
||||
void I2C_FastModeDutyCycleConfig(I2C_DutyCycle_TypeDef I2C_DutyCycle);
|
||||
void I2C_ITConfig(I2C_IT_TypeDef I2C_IT, FunctionalState NewState);
|
||||
uint8_t I2C_ReceiveData(void);
|
||||
void I2C_Send7bitAddress(uint8_t Address, I2C_Direction_TypeDef Direction);
|
||||
void I2C_SendData(uint8_t Data);
|
||||
/**
|
||||
* @brief
|
||||
****************************************************************************************
|
||||
*
|
||||
* I2C State Monitoring Functions
|
||||
*
|
||||
****************************************************************************************
|
||||
* This I2C driver provides three different ways for I2C state monitoring
|
||||
* depending on the application requirements and constraints:
|
||||
*
|
||||
*
|
||||
* 1) Basic state monitoring:
|
||||
* Using I2C_CheckEvent() function:
|
||||
* It compares the status registers (SR1, SR2 and SR3) content to a given event
|
||||
* (can be the combination of one or more flags).
|
||||
* It returns SUCCESS if the current status includes the given flags
|
||||
* and returns ERROR if one or more flags are missing in the current status.
|
||||
* - When to use:
|
||||
* - This function is suitable for most applications as well as for startup
|
||||
* activity since the events are fully described in the product reference manual
|
||||
* (RM0016).
|
||||
* - It is also suitable for users who need to define their own events.
|
||||
* - Limitations:
|
||||
* - If an error occurs (ie. error flags are set besides to the monitored flags),
|
||||
* the I2C_CheckEvent() function may return SUCCESS despite the communication
|
||||
* hold or corrupted real state.
|
||||
* In this case, it is advised to use error interrupts to monitor the error
|
||||
* events and handle them in the interrupt IRQ handler.
|
||||
*
|
||||
* @note
|
||||
* For error management, it is advised to use the following functions:
|
||||
* - I2C_ITConfig() to configure and enable the error interrupts (I2C_IT_ERR).
|
||||
* - I2C_IRQHandler() which is called when the I2C interrupts occur.
|
||||
* - I2C_GetFlagStatus() or I2C_GetITStatus() to be called into the
|
||||
* I2Cx_IRQHandler() function in order to determine which error occurred.
|
||||
* - I2C_ClearFlag() or I2C_ClearITPendingBit() and/or I2C_SoftwareResetCmd()
|
||||
* and/or I2C_GenerateStop() in order to clear the error flag and
|
||||
* source and return to correct communication status.
|
||||
*
|
||||
*
|
||||
* 2) Advanced state monitoring:
|
||||
* Using the function I2C_GetLastEvent() which returns the image of both SR1
|
||||
* & SR3 status registers in a single word (uint16_t) (Status Register 3 value
|
||||
* is shifted left by 8 bits and concatenated to Status Register 1).
|
||||
* - When to use:
|
||||
* - This function is suitable for the same applications above but it allows to
|
||||
* overcome the limitations of I2C_GetFlagStatus() function (see below).
|
||||
* The returned value could be compared to events already defined in the
|
||||
* library (stm8s_i2c.h) or to custom values defined by user.
|
||||
* - This function is suitable when multiple flags are monitored at the same time.
|
||||
* - At the opposite of I2C_CheckEvent() function, this function allows user to
|
||||
* choose when an event is accepted (when all events flags are set and no
|
||||
* other flags are set or just when the needed flags are set like
|
||||
* I2C_CheckEvent() function).
|
||||
* - Limitations:
|
||||
* - User may need to define his own events.
|
||||
* - Same remark concerning the error management is applicable for this
|
||||
* function if user decides to check only regular communication flags (and
|
||||
* ignores error flags).
|
||||
*
|
||||
*
|
||||
* 3) Flag-based state monitoring:
|
||||
* Using the function I2C_GetFlagStatus() which simply returns the status of
|
||||
* one single flag (ie. I2C_FLAG_RXNE ...).
|
||||
* - When to use:
|
||||
* - This function could be used for specific applications or in debug phase.
|
||||
* - It is suitable when only one flag checking is needed (most I2C events
|
||||
* are monitored through multiple flags).
|
||||
* - Limitations:
|
||||
* - When calling this function, the Status register is accessed. Some flags are
|
||||
* cleared when the status register is accessed. So checking the status
|
||||
* of one Flag, may clear other ones.
|
||||
* - Function may need to be called twice or more in order to monitor one
|
||||
* single event.
|
||||
*
|
||||
*/
|
||||
|
||||
/**
|
||||
*
|
||||
* 1) Basic state monitoring
|
||||
*******************************************************************************
|
||||
*/
|
||||
ErrorStatus I2C_CheckEvent(I2C_Event_TypeDef I2C_Event);
|
||||
/**
|
||||
*
|
||||
* 2) Advanced state monitoring
|
||||
*******************************************************************************
|
||||
*/
|
||||
I2C_Event_TypeDef I2C_GetLastEvent(void);
|
||||
/**
|
||||
*
|
||||
* 3) Flag-based state monitoring
|
||||
*******************************************************************************
|
||||
*/
|
||||
FlagStatus I2C_GetFlagStatus(I2C_Flag_TypeDef I2C_Flag);
|
||||
/**
|
||||
*
|
||||
*******************************************************************************
|
||||
*/
|
||||
void I2C_ClearFlag(I2C_Flag_TypeDef I2C_FLAG);
|
||||
ITStatus I2C_GetITStatus(I2C_ITPendingBit_TypeDef I2C_ITPendingBit);
|
||||
void I2C_ClearITPendingBit(I2C_ITPendingBit_TypeDef I2C_ITPendingBit);
|
||||
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
#endif /* __STM8S_I2C_H */
|
||||
|
||||
|
||||
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
|
||||
186
Serial/inc/stm8s_itc.h
Normal file
186
Serial/inc/stm8s_itc.h
Normal file
@@ -0,0 +1,186 @@
|
||||
/**
|
||||
******************************************************************************
|
||||
* @file stm8s_itc.h
|
||||
* @author MCD Application Team
|
||||
* @version V2.3.0
|
||||
* @date 16-June-2017
|
||||
* @brief This file contains all functions prototype and macros for the ITC peripheral.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© COPYRIGHT 2014 STMicroelectronics</center></h2>
|
||||
*
|
||||
* Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
|
||||
* You may not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at:
|
||||
*
|
||||
* http://www.st.com/software_license_agreement_liberty_v2
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an "AS IS" BASIS,
|
||||
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
/* Define to prevent recursive inclusion -------------------------------------*/
|
||||
#ifndef __STM8S_ITC_H
|
||||
#define __STM8S_ITC_H
|
||||
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
#include "stm8s.h"
|
||||
|
||||
/* Exported types ------------------------------------------------------------*/
|
||||
|
||||
/** @addtogroup ITC_Exported_Types
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @brief ITC Interrupt Lines selection
|
||||
*/
|
||||
typedef enum {
|
||||
ITC_IRQ_TLI = (uint8_t)0, /*!< Software interrupt */
|
||||
ITC_IRQ_AWU = (uint8_t)1, /*!< Auto wake up from halt interrupt */
|
||||
ITC_IRQ_CLK = (uint8_t)2, /*!< Clock controller interrupt */
|
||||
ITC_IRQ_PORTA = (uint8_t)3, /*!< Port A external interrupts */
|
||||
ITC_IRQ_PORTB = (uint8_t)4, /*!< Port B external interrupts */
|
||||
ITC_IRQ_PORTC = (uint8_t)5, /*!< Port C external interrupts */
|
||||
ITC_IRQ_PORTD = (uint8_t)6, /*!< Port D external interrupts */
|
||||
ITC_IRQ_PORTE = (uint8_t)7, /*!< Port E external interrupts */
|
||||
|
||||
#if defined(STM8S208) || defined(STM8AF52Ax)
|
||||
ITC_IRQ_CAN_RX = (uint8_t)8, /*!< beCAN RX interrupt */
|
||||
ITC_IRQ_CAN_TX = (uint8_t)9, /*!< beCAN TX/ER/SC interrupt */
|
||||
#endif /*STM8S208 or STM8AF52Ax */
|
||||
|
||||
#if defined(STM8S903) || defined(STM8AF622x)
|
||||
ITC_IRQ_PORTF = (uint8_t)8, /*!< Port F external interrupts */
|
||||
#endif /*STM8S903 or STM8AF622x */
|
||||
|
||||
ITC_IRQ_SPI = (uint8_t)10, /*!< SPI interrupt */
|
||||
ITC_IRQ_TIM1_OVF = (uint8_t)11, /*!< TIM1 update/overflow/underflow/trigger/
|
||||
break interrupt*/
|
||||
ITC_IRQ_TIM1_CAPCOM = (uint8_t)12, /*!< TIM1 capture/compare interrupt */
|
||||
|
||||
#if defined(STM8S903) || defined(STM8AF622x)
|
||||
ITC_IRQ_TIM5_OVFTRI = (uint8_t)13, /*!< TIM5 update/overflow/underflow/trigger/
|
||||
interrupt */
|
||||
ITC_IRQ_TIM5_CAPCOM = (uint8_t)14, /*!< TIM5 capture/compare interrupt */
|
||||
#else
|
||||
ITC_IRQ_TIM2_OVF = (uint8_t)13, /*!< TIM2 update /overflow interrupt */
|
||||
ITC_IRQ_TIM2_CAPCOM = (uint8_t)14, /*!< TIM2 capture/compare interrupt */
|
||||
#endif /*STM8S903 or STM8AF622x */
|
||||
|
||||
ITC_IRQ_TIM3_OVF = (uint8_t)15, /*!< TIM3 update /overflow interrupt*/
|
||||
ITC_IRQ_TIM3_CAPCOM = (uint8_t)16, /*!< TIM3 update /overflow interrupt */
|
||||
|
||||
#if defined(STM8S208) ||defined(STM8S207) || defined (STM8S007) || defined(STM8S103) || \
|
||||
defined(STM8S003) || defined(STM8S001) ||defined(STM8S903) || defined (STM8AF52Ax) || defined (STM8AF62Ax)
|
||||
ITC_IRQ_UART1_TX = (uint8_t)17, /*!< UART1 TX interrupt */
|
||||
ITC_IRQ_UART1_RX = (uint8_t)18, /*!< UART1 RX interrupt */
|
||||
#endif /*STM8S208 or STM8S207 or STM8S007 or STM8S103 or STM8S003 or STM8S001 or STM8S903 or STM8AF52Ax or STM8AF62Ax */
|
||||
#if defined(STM8AF622x)
|
||||
ITC_IRQ_UART4_TX = (uint8_t)17, /*!< UART4 TX interrupt */
|
||||
ITC_IRQ_UART4_RX = (uint8_t)18, /*!< UART4 RX interrupt */
|
||||
#endif /*STM8AF622x */
|
||||
|
||||
ITC_IRQ_I2C = (uint8_t)19, /*!< I2C interrupt */
|
||||
|
||||
#if defined(STM8S105) || defined(STM8S005) || defined(STM8AF626x)
|
||||
ITC_IRQ_UART2_TX = (uint8_t)20, /*!< USART2 TX interrupt */
|
||||
ITC_IRQ_UART2_RX = (uint8_t)21, /*!< USART2 RX interrupt */
|
||||
#endif /*STM8S105 or STM8AF626x */
|
||||
|
||||
#if defined(STM8S208) || defined(STM8S207) || defined(STM8S007) || defined(STM8AF52Ax) || defined(STM8AF62Ax)
|
||||
ITC_IRQ_UART3_TX = (uint8_t)20, /*!< USART3 TX interrupt */
|
||||
ITC_IRQ_UART3_RX = (uint8_t)21, /*!< USART3 RX interrupt */
|
||||
ITC_IRQ_ADC2 = (uint8_t)22, /*!< ADC2 interrupt */
|
||||
#endif /*STM8S208 or STM8S207 or STM8AF52Ax or STM8AF62Ax */
|
||||
|
||||
#if defined(STM8S105) || defined(STM8S005) || defined(STM8S103) || defined(STM8S003) || defined(STM8S001) || defined(STM8S903) || defined(STM8AF626x) || defined(STM8AF622x)
|
||||
ITC_IRQ_ADC1 = (uint8_t)22, /*!< ADC1 interrupt */
|
||||
#endif /*STM8S105 or STM8S005 or STM8S003 or STM8S103 or STM8S001 or STM8S903 or STM8AF626x or STM8AF622x */
|
||||
|
||||
#if defined(STM8S903) || defined(STM8AF622x)
|
||||
ITC_IRQ_TIM6_OVFTRI = (uint8_t)23, /*!< TIM6 update/overflow/underflow/trigger/
|
||||
interrupt */
|
||||
#else
|
||||
ITC_IRQ_TIM4_OVF = (uint8_t)23, /*!< TIM4 update /overflow interrupt */
|
||||
#endif /*STM8S903 or STM8AF622x */
|
||||
|
||||
ITC_IRQ_EEPROM_EEC = (uint8_t)24 /*!< Flash interrupt */
|
||||
} ITC_Irq_TypeDef;
|
||||
|
||||
/**
|
||||
* @brief ITC Priority Levels selection
|
||||
*/
|
||||
typedef enum {
|
||||
ITC_PRIORITYLEVEL_0 = (uint8_t)0x02, /*!< Software priority level 0 (cannot be written) */
|
||||
ITC_PRIORITYLEVEL_1 = (uint8_t)0x01, /*!< Software priority level 1 */
|
||||
ITC_PRIORITYLEVEL_2 = (uint8_t)0x00, /*!< Software priority level 2 */
|
||||
ITC_PRIORITYLEVEL_3 = (uint8_t)0x03 /*!< Software priority level 3 */
|
||||
} ITC_PriorityLevel_TypeDef;
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/* Exported constants --------------------------------------------------------*/
|
||||
|
||||
/** @addtogroup ITC_Exported_Constants
|
||||
* @{
|
||||
*/
|
||||
#define CPU_SOFT_INT_DISABLED ((uint8_t)0x28) /*!< Mask for I1 and I0 bits in CPU_CC register */
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/* Private macros ------------------------------------------------------------*/
|
||||
|
||||
/**
|
||||
* @brief Macros used by the assert function in order to check the different functions parameters.
|
||||
* @addtogroup ITC_Private_Macros
|
||||
* @{
|
||||
*/
|
||||
|
||||
/* Used by assert function */
|
||||
#define IS_ITC_IRQ_OK(IRQ) ((IRQ) <= (uint8_t)24)
|
||||
|
||||
/* Used by assert function */
|
||||
#define IS_ITC_PRIORITY_OK(PriorityValue) \
|
||||
(((PriorityValue) == ITC_PRIORITYLEVEL_0) || \
|
||||
((PriorityValue) == ITC_PRIORITYLEVEL_1) || \
|
||||
((PriorityValue) == ITC_PRIORITYLEVEL_2) || \
|
||||
((PriorityValue) == ITC_PRIORITYLEVEL_3))
|
||||
|
||||
/* Used by assert function */
|
||||
#define IS_ITC_INTERRUPTS_DISABLED (ITC_GetSoftIntStatus() == CPU_SOFT_INT_DISABLED)
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/* Exported functions ------------------------------------------------------- */
|
||||
|
||||
/** @addtogroup ITC_Exported_Functions
|
||||
* @{
|
||||
*/
|
||||
|
||||
uint8_t ITC_GetCPUCC(void);
|
||||
void ITC_DeInit(void);
|
||||
uint8_t ITC_GetSoftIntStatus(void);
|
||||
void ITC_SetSoftwarePriority(ITC_Irq_TypeDef IrqNum, ITC_PriorityLevel_TypeDef PriorityValue);
|
||||
ITC_PriorityLevel_TypeDef ITC_GetSoftwarePriority(ITC_Irq_TypeDef IrqNum);
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
#endif /* __STM8S_ITC_H */
|
||||
|
||||
|
||||
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
|
||||
131
Serial/inc/stm8s_iwdg.h
Normal file
131
Serial/inc/stm8s_iwdg.h
Normal file
@@ -0,0 +1,131 @@
|
||||
/**
|
||||
******************************************************************************
|
||||
* @file stm8s_iwdg.h
|
||||
* @author MCD Application Team
|
||||
* @version V2.3.0
|
||||
* @date 16-June-2017
|
||||
* @brief This file contains all functions prototypes and macros for the IWDG peripheral.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© COPYRIGHT 2014 STMicroelectronics</center></h2>
|
||||
*
|
||||
* Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
|
||||
* You may not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at:
|
||||
*
|
||||
* http://www.st.com/software_license_agreement_liberty_v2
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an "AS IS" BASIS,
|
||||
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
/* Define to prevent recursive inclusion -------------------------------------*/
|
||||
#ifndef __STM8S_IWDG_H
|
||||
#define __STM8S_IWDG_H
|
||||
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
#include "stm8s.h"
|
||||
|
||||
/** @addtogroup STM8S_StdPeriph_Driver
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @addtogroup IWDG_Private_Define
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @brief Define used to prevent watchdog reset
|
||||
*/
|
||||
#define IWDG_KEY_REFRESH ((uint8_t)0xAA) /*!< This value written in the Key register prevent the watchdog reset */
|
||||
|
||||
/**
|
||||
* @brief Define used to start the watchdog counter down
|
||||
*/
|
||||
#define IWDG_KEY_ENABLE ((uint8_t)0xCC) /*!< This value written in the Key register start the watchdog counting down*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @addtogroup IWDG_Private_Macros
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @brief Macro used by the assert function in order to check the different
|
||||
* values of the prescaler.
|
||||
*/
|
||||
#define IS_IWDG_PRESCALER_OK(VALUE) (((VALUE) == IWDG_Prescaler_4 ) || \
|
||||
((VALUE) == IWDG_Prescaler_8 ) || \
|
||||
((VALUE) == IWDG_Prescaler_16 ) || \
|
||||
((VALUE) == IWDG_Prescaler_32 ) || \
|
||||
((VALUE) == IWDG_Prescaler_64 ) || \
|
||||
((VALUE) == IWDG_Prescaler_128 ) || \
|
||||
((VALUE) == IWDG_Prescaler_256))
|
||||
|
||||
/**
|
||||
* @brief Macro used by the assert function in order to check the different
|
||||
* values of the counter register.
|
||||
*/
|
||||
#define IS_IWDG_WRITEACCESS_MODE_OK(MODE) (((MODE) == IWDG_WriteAccess_Enable) || ((MODE) == IWDG_WriteAccess_Disable))
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @addtogroup IWDG_Exported_Types
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** IWDG write access enumeration */
|
||||
typedef enum
|
||||
{
|
||||
IWDG_WriteAccess_Enable = (uint8_t)0x55, /*!< Code 0x55 in Key register, allow write access to Prescaler and Reload registers */
|
||||
IWDG_WriteAccess_Disable = (uint8_t)0x00 /*!< Code 0x00 in Key register, not allow write access to Prescaler and Reload registers */
|
||||
} IWDG_WriteAccess_TypeDef;
|
||||
|
||||
/** IWDG prescaler enumaration */
|
||||
typedef enum
|
||||
{
|
||||
IWDG_Prescaler_4 = (uint8_t)0x00, /*!< Used to set prescaler register to 4 */
|
||||
IWDG_Prescaler_8 = (uint8_t)0x01, /*!< Used to set prescaler register to 8 */
|
||||
IWDG_Prescaler_16 = (uint8_t)0x02, /*!< Used to set prescaler register to 16 */
|
||||
IWDG_Prescaler_32 = (uint8_t)0x03, /*!< Used to set prescaler register to 32 */
|
||||
IWDG_Prescaler_64 = (uint8_t)0x04, /*!< Used to set prescaler register to 64 */
|
||||
IWDG_Prescaler_128 = (uint8_t)0x05, /*!< Used to set prescaler register to 128 */
|
||||
IWDG_Prescaler_256 = (uint8_t)0x06 /*!< Used to set prescaler register to 256 */
|
||||
} IWDG_Prescaler_TypeDef;
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @addtogroup IWDG_Exported_Functions
|
||||
* @{
|
||||
*/
|
||||
|
||||
void IWDG_WriteAccessCmd(IWDG_WriteAccess_TypeDef IWDG_WriteAccess);
|
||||
void IWDG_SetPrescaler(IWDG_Prescaler_TypeDef IWDG_Prescaler);
|
||||
void IWDG_SetReload(uint8_t IWDG_Reload);
|
||||
void IWDG_ReloadCounter(void);
|
||||
void IWDG_Enable(void);
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
#endif /* __STM8S_IWDG_H */
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
|
||||
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
|
||||
92
Serial/inc/stm8s_rst.h
Normal file
92
Serial/inc/stm8s_rst.h
Normal file
@@ -0,0 +1,92 @@
|
||||
/**
|
||||
******************************************************************************
|
||||
* @file stm8s_rst.h
|
||||
* @author MCD Application Team
|
||||
* @version V2.3.0
|
||||
* @date 16-June-2017
|
||||
* @brief This file contains all functions prototype and macros for the RST peripheral.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© COPYRIGHT 2014 STMicroelectronics</center></h2>
|
||||
*
|
||||
* Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
|
||||
* You may not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at:
|
||||
*
|
||||
* http://www.st.com/software_license_agreement_liberty_v2
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an "AS IS" BASIS,
|
||||
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
/* Define to prevent recursive inclusion -------------------------------------*/
|
||||
#ifndef __STM8S_RST_H
|
||||
#define __STM8S_RST_H
|
||||
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
#include "stm8s.h"
|
||||
|
||||
/** @addtogroup STM8S_StdPeriph_Driver
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @addtogroup RST_Exported_Types
|
||||
* @{
|
||||
*/
|
||||
typedef enum {
|
||||
RST_FLAG_EMCF = (uint8_t)0x10, /*!< EMC reset flag */
|
||||
RST_FLAG_SWIMF = (uint8_t)0x08, /*!< SWIM reset flag */
|
||||
RST_FLAG_ILLOPF = (uint8_t)0x04, /*!< Illigal opcode reset flag */
|
||||
RST_FLAG_IWDGF = (uint8_t)0x02, /*!< Independent watchdog reset flag */
|
||||
RST_FLAG_WWDGF = (uint8_t)0x01 /*!< Window watchdog reset flag */
|
||||
}RST_Flag_TypeDef;
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/* Exported constants --------------------------------------------------------*/
|
||||
/* Exported macros -----------------------------------------------------------*/
|
||||
|
||||
/** @addtogroup RST_Private_Macros
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @brief Macro used by the assert function to check the different functions parameters.
|
||||
*/
|
||||
/**
|
||||
* @brief Macro used by the assert function to check the different RST flags.
|
||||
*/
|
||||
#define IS_RST_FLAG_OK(FLAG) (((FLAG) == RST_FLAG_EMCF) || \
|
||||
((FLAG) == RST_FLAG_SWIMF) ||\
|
||||
((FLAG) == RST_FLAG_ILLOPF) ||\
|
||||
((FLAG) == RST_FLAG_IWDGF) ||\
|
||||
((FLAG) == RST_FLAG_WWDGF))
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @addtogroup RST_Exported_functions
|
||||
* @{
|
||||
*/
|
||||
FlagStatus RST_GetFlagStatus(RST_Flag_TypeDef RST_Flag);
|
||||
void RST_ClearFlag(RST_Flag_TypeDef RST_Flag);
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
#endif /* __STM8S_RST_H */
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
|
||||
336
Serial/inc/stm8s_spi.h
Normal file
336
Serial/inc/stm8s_spi.h
Normal file
@@ -0,0 +1,336 @@
|
||||
/**
|
||||
******************************************************************************
|
||||
* @file stm8s_spi.h
|
||||
* @author MCD Application Team
|
||||
* @version V2.3.0
|
||||
* @date 16-June-2017
|
||||
* @brief This file contains all functions prototype and macros for the SPI peripheral.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© COPYRIGHT 2014 STMicroelectronics</center></h2>
|
||||
*
|
||||
* Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
|
||||
* You may not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at:
|
||||
*
|
||||
* http://www.st.com/software_license_agreement_liberty_v2
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an "AS IS" BASIS,
|
||||
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
/* Define to prevent recursive inclusion -------------------------------------*/
|
||||
#ifndef __STM8S_SPI_H
|
||||
#define __STM8S_SPI_H
|
||||
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
#include "stm8s.h"
|
||||
|
||||
/** @addtogroup STM8S_StdPeriph_Driver
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @addtogroup SPI_Exported_Types
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @brief SPI data direction mode
|
||||
* Warning: element values correspond to BDM, BDOE, RXONLY bits position
|
||||
*/
|
||||
typedef enum {
|
||||
SPI_DATADIRECTION_2LINES_FULLDUPLEX = (uint8_t)0x00, /*!< 2-line uni-directional data mode enable */
|
||||
SPI_DATADIRECTION_2LINES_RXONLY = (uint8_t)0x04, /*!< Receiver only in 2 line uni-directional data mode */
|
||||
SPI_DATADIRECTION_1LINE_RX = (uint8_t)0x80, /*!< Receiver only in 1 line bi-directional data mode */
|
||||
SPI_DATADIRECTION_1LINE_TX = (uint8_t)0xC0 /*!< Transmit only in 1 line bi-directional data mode */
|
||||
} SPI_DataDirection_TypeDef;
|
||||
|
||||
/**
|
||||
* @brief SPI Slave Select management
|
||||
* Warning: element values correspond to LSBFIRST bit position
|
||||
*/
|
||||
typedef enum
|
||||
{
|
||||
SPI_NSS_SOFT = (uint8_t)0x02, /*!< Software slave management disabled */
|
||||
SPI_NSS_HARD = (uint8_t)0x00 /*!< Software slave management enabled */
|
||||
} SPI_NSS_TypeDef;
|
||||
|
||||
|
||||
/**
|
||||
* @brief SPI direction transmit/receive
|
||||
*/
|
||||
|
||||
typedef enum {
|
||||
SPI_DIRECTION_RX = (uint8_t)0x00, /*!< Selects Rx receive direction in bi-directional mode */
|
||||
SPI_DIRECTION_TX = (uint8_t)0x01 /*!< Selects Tx transmission direction in bi-directional mode */
|
||||
} SPI_Direction_TypeDef;
|
||||
|
||||
/**
|
||||
* @brief SPI master/slave mode
|
||||
* Warning: element values correspond to MSTR bit position
|
||||
*/
|
||||
typedef enum {
|
||||
SPI_MODE_MASTER = (uint8_t)0x04, /*!< SPI Master configuration */
|
||||
SPI_MODE_SLAVE = (uint8_t)0x00 /*!< SPI Slave configuration */
|
||||
} SPI_Mode_TypeDef;
|
||||
|
||||
/**
|
||||
* @brief SPI BaudRate Prescaler
|
||||
* Warning: element values correspond to BR bits position
|
||||
*/
|
||||
typedef enum {
|
||||
SPI_BAUDRATEPRESCALER_2 = (uint8_t)0x00, /*!< SPI frequency = frequency(CPU)/2 */
|
||||
SPI_BAUDRATEPRESCALER_4 = (uint8_t)0x08, /*!< SPI frequency = frequency(CPU)/4 */
|
||||
SPI_BAUDRATEPRESCALER_8 = (uint8_t)0x10, /*!< SPI frequency = frequency(CPU)/8 */
|
||||
SPI_BAUDRATEPRESCALER_16 = (uint8_t)0x18, /*!< SPI frequency = frequency(CPU)/16 */
|
||||
SPI_BAUDRATEPRESCALER_32 = (uint8_t)0x20, /*!< SPI frequency = frequency(CPU)/32 */
|
||||
SPI_BAUDRATEPRESCALER_64 = (uint8_t)0x28, /*!< SPI frequency = frequency(CPU)/64 */
|
||||
SPI_BAUDRATEPRESCALER_128 = (uint8_t)0x30, /*!< SPI frequency = frequency(CPU)/128 */
|
||||
SPI_BAUDRATEPRESCALER_256 = (uint8_t)0x38 /*!< SPI frequency = frequency(CPU)/256 */
|
||||
} SPI_BaudRatePrescaler_TypeDef;
|
||||
|
||||
/**
|
||||
* @brief SPI Clock Polarity
|
||||
* Warning: element values correspond to CPOL bit position
|
||||
*/
|
||||
typedef enum {
|
||||
SPI_CLOCKPOLARITY_LOW = (uint8_t)0x00, /*!< Clock to 0 when idle */
|
||||
SPI_CLOCKPOLARITY_HIGH = (uint8_t)0x02 /*!< Clock to 1 when idle */
|
||||
} SPI_ClockPolarity_TypeDef;
|
||||
|
||||
/**
|
||||
* @brief SPI Clock Phase
|
||||
* Warning: element values correspond to CPHA bit position
|
||||
*/
|
||||
typedef enum {
|
||||
SPI_CLOCKPHASE_1EDGE = (uint8_t)0x00, /*!< The first clock transition is the first data capture edge */
|
||||
SPI_CLOCKPHASE_2EDGE = (uint8_t)0x01 /*!< The second clock transition is the first data capture edge */
|
||||
} SPI_ClockPhase_TypeDef;
|
||||
|
||||
/**
|
||||
* @brief SPI Frame Format: MSB or LSB transmitted first
|
||||
* Warning: element values correspond to LSBFIRST bit position
|
||||
*/
|
||||
typedef enum {
|
||||
SPI_FIRSTBIT_MSB = (uint8_t)0x00, /*!< MSB bit will be transmitted first */
|
||||
SPI_FIRSTBIT_LSB = (uint8_t)0x80 /*!< LSB bit will be transmitted first */
|
||||
} SPI_FirstBit_TypeDef;
|
||||
|
||||
/**
|
||||
* @brief SPI CRC Transmit/Receive
|
||||
*/
|
||||
typedef enum {
|
||||
SPI_CRC_RX = (uint8_t)0x00, /*!< Select Tx CRC register */
|
||||
SPI_CRC_TX = (uint8_t)0x01 /*!< Select Rx CRC register */
|
||||
} SPI_CRC_TypeDef;
|
||||
|
||||
/**
|
||||
* @brief SPI flags definition - Warning : FLAG value = mapping position register
|
||||
*/
|
||||
typedef enum {
|
||||
SPI_FLAG_BSY = (uint8_t)0x80, /*!< Busy flag */
|
||||
SPI_FLAG_OVR = (uint8_t)0x40, /*!< Overrun flag */
|
||||
SPI_FLAG_MODF = (uint8_t)0x20, /*!< Mode fault */
|
||||
SPI_FLAG_CRCERR = (uint8_t)0x10, /*!< CRC error flag */
|
||||
SPI_FLAG_WKUP = (uint8_t)0x08, /*!< Wake-up flag */
|
||||
SPI_FLAG_TXE = (uint8_t)0x02, /*!< Transmit buffer empty */
|
||||
SPI_FLAG_RXNE = (uint8_t)0x01 /*!< Receive buffer empty */
|
||||
} SPI_Flag_TypeDef;
|
||||
|
||||
/**
|
||||
* @brief SPI_IT possible values
|
||||
* Elements values convention: 0xYX
|
||||
* X: Position of the corresponding Interrupt
|
||||
* Y: ITPENDINGBIT position
|
||||
*/
|
||||
typedef enum
|
||||
{
|
||||
SPI_IT_WKUP = (uint8_t)0x34, /*!< Wake-up interrupt*/
|
||||
SPI_IT_OVR = (uint8_t)0x65, /*!< Overrun interrupt*/
|
||||
SPI_IT_MODF = (uint8_t)0x55, /*!< Mode fault interrupt*/
|
||||
SPI_IT_CRCERR = (uint8_t)0x45, /*!< CRC error interrupt*/
|
||||
SPI_IT_TXE = (uint8_t)0x17, /*!< Transmit buffer empty interrupt*/
|
||||
SPI_IT_RXNE = (uint8_t)0x06, /*!< Receive buffer not empty interrupt*/
|
||||
SPI_IT_ERR = (uint8_t)0x05 /*!< Error interrupt*/
|
||||
} SPI_IT_TypeDef;
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/* Private define ------------------------------------------------------------*/
|
||||
|
||||
/** @addtogroup SPI_Private_Macros
|
||||
* @brief Macros used by the assert_param function to check the different functions parameters.
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @brief Macro used by the assert_param function in order to check the data direction mode values
|
||||
*/
|
||||
#define IS_SPI_DATA_DIRECTION_OK(MODE) (((MODE) == SPI_DATADIRECTION_2LINES_FULLDUPLEX) || \
|
||||
((MODE) == SPI_DATADIRECTION_2LINES_RXONLY) || \
|
||||
((MODE) == SPI_DATADIRECTION_1LINE_RX) || \
|
||||
((MODE) == SPI_DATADIRECTION_1LINE_TX))
|
||||
|
||||
/**
|
||||
* @brief Macro used by the assert_param function in order to check the mode
|
||||
* half duplex data direction values
|
||||
*/
|
||||
#define IS_SPI_DIRECTION_OK(DIRECTION) (((DIRECTION) == SPI_DIRECTION_RX) || \
|
||||
((DIRECTION) == SPI_DIRECTION_TX))
|
||||
|
||||
/**
|
||||
* @brief Macro used by the assert_param function in order to check the NSS
|
||||
* management values
|
||||
*/
|
||||
#define IS_SPI_SLAVEMANAGEMENT_OK(NSS) (((NSS) == SPI_NSS_SOFT) || \
|
||||
((NSS) == SPI_NSS_HARD))
|
||||
|
||||
|
||||
/**
|
||||
* @brief Macro used by the assert_param function in order to check the different
|
||||
* sensitivity values for the CRC polynomial
|
||||
*/
|
||||
#define IS_SPI_CRC_POLYNOMIAL_OK(POLYNOMIAL) ((POLYNOMIAL) > (uint8_t)0x00)
|
||||
|
||||
/**
|
||||
* @brief Macro used by the assert_param function in order to check the SPI Mode values
|
||||
*/
|
||||
#define IS_SPI_MODE_OK(MODE) (((MODE) == SPI_MODE_MASTER) || \
|
||||
((MODE) == SPI_MODE_SLAVE))
|
||||
|
||||
/**
|
||||
* @brief Macro used by the assert_param function in order to check the baudrate values
|
||||
*/
|
||||
#define IS_SPI_BAUDRATE_PRESCALER_OK(PRESCALER) (((PRESCALER) == SPI_BAUDRATEPRESCALER_2) || \
|
||||
((PRESCALER) == SPI_BAUDRATEPRESCALER_4) || \
|
||||
((PRESCALER) == SPI_BAUDRATEPRESCALER_8) || \
|
||||
((PRESCALER) == SPI_BAUDRATEPRESCALER_16) || \
|
||||
((PRESCALER) == SPI_BAUDRATEPRESCALER_32) || \
|
||||
((PRESCALER) == SPI_BAUDRATEPRESCALER_64) || \
|
||||
((PRESCALER) == SPI_BAUDRATEPRESCALER_128) || \
|
||||
((PRESCALER) == SPI_BAUDRATEPRESCALER_256))
|
||||
|
||||
/**
|
||||
* @brief Macro used by the assert_param function in order to check the polarity values
|
||||
*/
|
||||
#define IS_SPI_POLARITY_OK(CLKPOL) (((CLKPOL) == SPI_CLOCKPOLARITY_LOW) || \
|
||||
((CLKPOL) == SPI_CLOCKPOLARITY_HIGH))
|
||||
|
||||
/**
|
||||
* @brief Macro used by the assert_param function in order to check the phase values
|
||||
*/
|
||||
#define IS_SPI_PHASE_OK(CLKPHA) (((CLKPHA) == SPI_CLOCKPHASE_1EDGE) || \
|
||||
((CLKPHA) == SPI_CLOCKPHASE_2EDGE))
|
||||
|
||||
/**
|
||||
* @brief Macro used by the assert_param function in order to check the first
|
||||
* bit to be transmited values
|
||||
*/
|
||||
#define IS_SPI_FIRSTBIT_OK(BIT) (((BIT) == SPI_FIRSTBIT_MSB) || \
|
||||
((BIT) == SPI_FIRSTBIT_LSB))
|
||||
|
||||
/**
|
||||
* @brief Macro used by the assert_param function in order to check the CRC
|
||||
* Transmit/Receive
|
||||
*/
|
||||
#define IS_SPI_CRC_OK(CRC) (((CRC) == SPI_CRC_TX) || \
|
||||
((CRC) == SPI_CRC_RX))
|
||||
|
||||
/**
|
||||
* @brief Macro used by the assert_param function in order to check the
|
||||
* different flags values
|
||||
*/
|
||||
#define IS_SPI_FLAGS_OK(FLAG) (((FLAG) == SPI_FLAG_OVR) || \
|
||||
((FLAG) == SPI_FLAG_MODF) || \
|
||||
((FLAG) == SPI_FLAG_CRCERR) || \
|
||||
((FLAG) == SPI_FLAG_WKUP) || \
|
||||
((FLAG) == SPI_FLAG_TXE) || \
|
||||
((FLAG) == SPI_FLAG_RXNE) || \
|
||||
((FLAG) == SPI_FLAG_BSY))
|
||||
|
||||
/**
|
||||
* @brief Macro used by the assert_param function in order to check the
|
||||
* different sensitivity values for the flag that can be cleared
|
||||
* by writing 0
|
||||
*/
|
||||
#define IS_SPI_CLEAR_FLAGS_OK(FLAG) (((FLAG) == SPI_FLAG_CRCERR) || \
|
||||
((FLAG) == SPI_FLAG_WKUP))
|
||||
|
||||
/**
|
||||
* @brief Macro used by the assert_param function in order to check the
|
||||
* different sensitivity values for the Interrupts
|
||||
*/
|
||||
#define IS_SPI_CONFIG_IT_OK(Interrupt) (((Interrupt) == SPI_IT_TXE) || \
|
||||
((Interrupt) == SPI_IT_RXNE) || \
|
||||
((Interrupt) == SPI_IT_ERR) || \
|
||||
((Interrupt) == SPI_IT_WKUP))
|
||||
|
||||
/**
|
||||
* @brief Macro used by the assert_param function in order to check the
|
||||
* different sensitivity values for the pending bit
|
||||
*/
|
||||
#define IS_SPI_GET_IT_OK(ITPendingBit) (((ITPendingBit) == SPI_IT_OVR) || \
|
||||
((ITPendingBit) == SPI_IT_MODF) || \
|
||||
((ITPendingBit) == SPI_IT_CRCERR) || \
|
||||
((ITPendingBit) == SPI_IT_WKUP) || \
|
||||
((ITPendingBit) == SPI_IT_TXE) || \
|
||||
((ITPendingBit) == SPI_IT_RXNE))
|
||||
|
||||
/**
|
||||
* @brief Macro used by the assert_param function in order to check the
|
||||
* different sensitivity values for the pending bit that can be cleared
|
||||
* by writing 0
|
||||
*/
|
||||
#define IS_SPI_CLEAR_IT_OK(ITPendingBit) (((ITPendingBit) == SPI_IT_CRCERR) || \
|
||||
((ITPendingBit) == SPI_IT_WKUP))
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @addtogroup SPI_Exported_Functions
|
||||
* @{
|
||||
*/
|
||||
void SPI_DeInit(void);
|
||||
void SPI_Init(SPI_FirstBit_TypeDef FirstBit,
|
||||
SPI_BaudRatePrescaler_TypeDef BaudRatePrescaler,
|
||||
SPI_Mode_TypeDef Mode, SPI_ClockPolarity_TypeDef ClockPolarity,
|
||||
SPI_ClockPhase_TypeDef ClockPhase,
|
||||
SPI_DataDirection_TypeDef Data_Direction,
|
||||
SPI_NSS_TypeDef Slave_Management, uint8_t CRCPolynomial);
|
||||
void SPI_Cmd(FunctionalState NewState);
|
||||
void SPI_ITConfig(SPI_IT_TypeDef SPI_IT, FunctionalState NewState);
|
||||
void SPI_SendData(uint8_t Data);
|
||||
uint8_t SPI_ReceiveData(void);
|
||||
void SPI_NSSInternalSoftwareCmd(FunctionalState NewState);
|
||||
void SPI_TransmitCRC(void);
|
||||
void SPI_CalculateCRCCmd(FunctionalState NewState);
|
||||
uint8_t SPI_GetCRC(SPI_CRC_TypeDef SPI_CRC);
|
||||
void SPI_ResetCRC(void);
|
||||
uint8_t SPI_GetCRCPolynomial(void);
|
||||
void SPI_BiDirectionalLineConfig(SPI_Direction_TypeDef SPI_Direction);
|
||||
FlagStatus SPI_GetFlagStatus(SPI_Flag_TypeDef SPI_FLAG);
|
||||
void SPI_ClearFlag(SPI_Flag_TypeDef SPI_FLAG);
|
||||
ITStatus SPI_GetITStatus(SPI_IT_TypeDef SPI_IT);
|
||||
void SPI_ClearITPendingBit(SPI_IT_TypeDef SPI_IT);
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
#endif /* __STM8S_SPI_H */
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
|
||||
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
|
||||
623
Serial/inc/stm8s_tim1.h
Normal file
623
Serial/inc/stm8s_tim1.h
Normal file
@@ -0,0 +1,623 @@
|
||||
/**
|
||||
******************************************************************************
|
||||
* @file stm8s_tim1.h
|
||||
* @author MCD Application Team
|
||||
* @version V2.3.0
|
||||
* @date 16-June-2017
|
||||
* @brief This file contains all functions prototype and macros for the TIM1 peripheral.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© COPYRIGHT 2014 STMicroelectronics</center></h2>
|
||||
*
|
||||
* Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
|
||||
* You may not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at:
|
||||
*
|
||||
* http://www.st.com/software_license_agreement_liberty_v2
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an "AS IS" BASIS,
|
||||
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
/* Define to prevent recursive inclusion -------------------------------------*/
|
||||
#ifndef __STM8S_TIM1_H
|
||||
#define __STM8S_TIM1_H
|
||||
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
#include "stm8s.h"
|
||||
|
||||
/** @addtogroup STM8S_StdPeriph_Driver
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @addtogroup TIM1_Exported_Types
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** TIM1 Output Compare and PWM modes */
|
||||
|
||||
typedef enum
|
||||
{
|
||||
TIM1_OCMODE_TIMING = ((uint8_t)0x00),
|
||||
TIM1_OCMODE_ACTIVE = ((uint8_t)0x10),
|
||||
TIM1_OCMODE_INACTIVE = ((uint8_t)0x20),
|
||||
TIM1_OCMODE_TOGGLE = ((uint8_t)0x30),
|
||||
TIM1_OCMODE_PWM1 = ((uint8_t)0x60),
|
||||
TIM1_OCMODE_PWM2 = ((uint8_t)0x70)
|
||||
}TIM1_OCMode_TypeDef;
|
||||
|
||||
#define IS_TIM1_OC_MODE_OK(MODE) (((MODE) == TIM1_OCMODE_TIMING) || \
|
||||
((MODE) == TIM1_OCMODE_ACTIVE) || \
|
||||
((MODE) == TIM1_OCMODE_INACTIVE) || \
|
||||
((MODE) == TIM1_OCMODE_TOGGLE)|| \
|
||||
((MODE) == TIM1_OCMODE_PWM1) || \
|
||||
((MODE) == TIM1_OCMODE_PWM2))
|
||||
|
||||
#define IS_TIM1_OCM_OK(MODE)(((MODE) == TIM1_OCMODE_TIMING) || \
|
||||
((MODE) == TIM1_OCMODE_ACTIVE) || \
|
||||
((MODE) == TIM1_OCMODE_INACTIVE) || \
|
||||
((MODE) == TIM1_OCMODE_TOGGLE)|| \
|
||||
((MODE) == TIM1_OCMODE_PWM1) || \
|
||||
((MODE) == TIM1_OCMODE_PWM2) || \
|
||||
((MODE) == (uint8_t)TIM1_FORCEDACTION_ACTIVE) || \
|
||||
((MODE) == (uint8_t)TIM1_FORCEDACTION_INACTIVE))
|
||||
|
||||
/** TIM1 One Pulse Mode */
|
||||
typedef enum
|
||||
{
|
||||
TIM1_OPMODE_SINGLE = ((uint8_t)0x01),
|
||||
TIM1_OPMODE_REPETITIVE = ((uint8_t)0x00)
|
||||
}TIM1_OPMode_TypeDef;
|
||||
|
||||
#define IS_TIM1_OPM_MODE_OK(MODE) (((MODE) == TIM1_OPMODE_SINGLE) || \
|
||||
((MODE) == TIM1_OPMODE_REPETITIVE))
|
||||
|
||||
/** TIM1 Channel */
|
||||
|
||||
typedef enum
|
||||
{
|
||||
TIM1_CHANNEL_1 = ((uint8_t)0x00),
|
||||
TIM1_CHANNEL_2 = ((uint8_t)0x01),
|
||||
TIM1_CHANNEL_3 = ((uint8_t)0x02),
|
||||
TIM1_CHANNEL_4 = ((uint8_t)0x03)
|
||||
}TIM1_Channel_TypeDef;
|
||||
|
||||
|
||||
#define IS_TIM1_CHANNEL_OK(CHANNEL) (((CHANNEL) == TIM1_CHANNEL_1) || \
|
||||
((CHANNEL) == TIM1_CHANNEL_2) || \
|
||||
((CHANNEL) == TIM1_CHANNEL_3) || \
|
||||
((CHANNEL) == TIM1_CHANNEL_4))
|
||||
|
||||
#define IS_TIM1_PWMI_CHANNEL_OK(CHANNEL) (((CHANNEL) == TIM1_CHANNEL_1) || \
|
||||
((CHANNEL) == TIM1_CHANNEL_2))
|
||||
|
||||
#define IS_TIM1_COMPLEMENTARY_CHANNEL_OK(CHANNEL) (((CHANNEL) == TIM1_CHANNEL_1) || \
|
||||
((CHANNEL) == TIM1_CHANNEL_2) || \
|
||||
((CHANNEL) == TIM1_CHANNEL_3))
|
||||
|
||||
|
||||
/** TIM1 Counter Mode */
|
||||
typedef enum
|
||||
{
|
||||
TIM1_COUNTERMODE_UP = ((uint8_t)0x00),
|
||||
TIM1_COUNTERMODE_DOWN = ((uint8_t)0x10),
|
||||
TIM1_COUNTERMODE_CENTERALIGNED1 = ((uint8_t)0x20),
|
||||
TIM1_COUNTERMODE_CENTERALIGNED2 = ((uint8_t)0x40),
|
||||
TIM1_COUNTERMODE_CENTERALIGNED3 = ((uint8_t)0x60)
|
||||
}TIM1_CounterMode_TypeDef;
|
||||
|
||||
#define IS_TIM1_COUNTER_MODE_OK(MODE) (((MODE) == TIM1_COUNTERMODE_UP) || \
|
||||
((MODE) == TIM1_COUNTERMODE_DOWN) || \
|
||||
((MODE) == TIM1_COUNTERMODE_CENTERALIGNED1) || \
|
||||
((MODE) == TIM1_COUNTERMODE_CENTERALIGNED2) || \
|
||||
((MODE) == TIM1_COUNTERMODE_CENTERALIGNED3))
|
||||
|
||||
/** TIM1 Output Compare Polarity */
|
||||
typedef enum
|
||||
{
|
||||
TIM1_OCPOLARITY_HIGH = ((uint8_t)0x00),
|
||||
TIM1_OCPOLARITY_LOW = ((uint8_t)0x22)
|
||||
}TIM1_OCPolarity_TypeDef;
|
||||
|
||||
#define IS_TIM1_OC_POLARITY_OK(POLARITY) (((POLARITY) == TIM1_OCPOLARITY_HIGH) || \
|
||||
((POLARITY) == TIM1_OCPOLARITY_LOW))
|
||||
|
||||
/** TIM1 Output Compare N Polarity */
|
||||
typedef enum
|
||||
{
|
||||
TIM1_OCNPOLARITY_HIGH = ((uint8_t)0x00),
|
||||
TIM1_OCNPOLARITY_LOW = ((uint8_t)0x88)
|
||||
}TIM1_OCNPolarity_TypeDef;
|
||||
|
||||
#define IS_TIM1_OCN_POLARITY_OK(POLARITY) (((POLARITY) == TIM1_OCNPOLARITY_HIGH) || \
|
||||
((POLARITY) == TIM1_OCNPOLARITY_LOW))
|
||||
|
||||
/** TIM1 Output Compare states */
|
||||
typedef enum
|
||||
{
|
||||
TIM1_OUTPUTSTATE_DISABLE = ((uint8_t)0x00),
|
||||
TIM1_OUTPUTSTATE_ENABLE = ((uint8_t)0x11)
|
||||
}TIM1_OutputState_TypeDef;
|
||||
|
||||
#define IS_TIM1_OUTPUT_STATE_OK(STATE) (((STATE) == TIM1_OUTPUTSTATE_DISABLE) || \
|
||||
((STATE) == TIM1_OUTPUTSTATE_ENABLE))
|
||||
|
||||
/** TIM1 Output Compare N States */
|
||||
typedef enum
|
||||
{
|
||||
TIM1_OUTPUTNSTATE_DISABLE = ((uint8_t)0x00),
|
||||
TIM1_OUTPUTNSTATE_ENABLE = ((uint8_t)0x44)
|
||||
} TIM1_OutputNState_TypeDef;
|
||||
|
||||
#define IS_TIM1_OUTPUTN_STATE_OK(STATE) (((STATE) == TIM1_OUTPUTNSTATE_DISABLE) ||\
|
||||
((STATE) == TIM1_OUTPUTNSTATE_ENABLE))
|
||||
|
||||
/** TIM1 Break Input enable/disable */
|
||||
typedef enum
|
||||
{
|
||||
TIM1_BREAK_ENABLE = ((uint8_t)0x10),
|
||||
TIM1_BREAK_DISABLE = ((uint8_t)0x00)
|
||||
}TIM1_BreakState_TypeDef;
|
||||
#define IS_TIM1_BREAK_STATE_OK(STATE) (((STATE) == TIM1_BREAK_ENABLE) || \
|
||||
((STATE) == TIM1_BREAK_DISABLE))
|
||||
|
||||
/** TIM1 Break Polarity */
|
||||
typedef enum
|
||||
{
|
||||
TIM1_BREAKPOLARITY_LOW = ((uint8_t)0x00),
|
||||
TIM1_BREAKPOLARITY_HIGH = ((uint8_t)0x20)
|
||||
}TIM1_BreakPolarity_TypeDef;
|
||||
#define IS_TIM1_BREAK_POLARITY_OK(POLARITY) (((POLARITY) == TIM1_BREAKPOLARITY_LOW) || \
|
||||
((POLARITY) == TIM1_BREAKPOLARITY_HIGH))
|
||||
|
||||
/** TIM1 AOE Bit Set/Reset */
|
||||
typedef enum
|
||||
{
|
||||
TIM1_AUTOMATICOUTPUT_ENABLE = ((uint8_t)0x40),
|
||||
TIM1_AUTOMATICOUTPUT_DISABLE = ((uint8_t)0x00)
|
||||
}TIM1_AutomaticOutput_TypeDef;
|
||||
|
||||
#define IS_TIM1_AUTOMATIC_OUTPUT_STATE_OK(STATE) (((STATE) == TIM1_AUTOMATICOUTPUT_ENABLE) || \
|
||||
((STATE) == TIM1_AUTOMATICOUTPUT_DISABLE))
|
||||
|
||||
/** TIM1 Lock levels */
|
||||
typedef enum
|
||||
{
|
||||
TIM1_LOCKLEVEL_OFF = ((uint8_t)0x00),
|
||||
TIM1_LOCKLEVEL_1 = ((uint8_t)0x01),
|
||||
TIM1_LOCKLEVEL_2 = ((uint8_t)0x02),
|
||||
TIM1_LOCKLEVEL_3 = ((uint8_t)0x03)
|
||||
}TIM1_LockLevel_TypeDef;
|
||||
|
||||
#define IS_TIM1_LOCK_LEVEL_OK(LEVEL) (((LEVEL) == TIM1_LOCKLEVEL_OFF) || \
|
||||
((LEVEL) == TIM1_LOCKLEVEL_1) || \
|
||||
((LEVEL) == TIM1_LOCKLEVEL_2) || \
|
||||
((LEVEL) == TIM1_LOCKLEVEL_3))
|
||||
|
||||
/** TIM1 OSSI: Off-State Selection for Idle mode states */
|
||||
typedef enum
|
||||
{
|
||||
TIM1_OSSISTATE_ENABLE = ((uint8_t)0x04),
|
||||
TIM1_OSSISTATE_DISABLE = ((uint8_t)0x00)
|
||||
}TIM1_OSSIState_TypeDef;
|
||||
|
||||
#define IS_TIM1_OSSI_STATE_OK(STATE) (((STATE) == TIM1_OSSISTATE_ENABLE) || \
|
||||
((STATE) == TIM1_OSSISTATE_DISABLE))
|
||||
|
||||
/** TIM1 Output Compare Idle State */
|
||||
typedef enum
|
||||
{
|
||||
TIM1_OCIDLESTATE_SET = ((uint8_t)0x55),
|
||||
TIM1_OCIDLESTATE_RESET = ((uint8_t)0x00)
|
||||
}TIM1_OCIdleState_TypeDef;
|
||||
|
||||
#define IS_TIM1_OCIDLE_STATE_OK(STATE) (((STATE) == TIM1_OCIDLESTATE_SET) || \
|
||||
((STATE) == TIM1_OCIDLESTATE_RESET))
|
||||
|
||||
/** TIM1 Output Compare N Idle State */
|
||||
typedef enum
|
||||
{
|
||||
TIM1_OCNIDLESTATE_SET = ((uint8_t)0x2A),
|
||||
TIM1_OCNIDLESTATE_RESET = ((uint8_t)0x00)
|
||||
}TIM1_OCNIdleState_TypeDef;
|
||||
|
||||
#define IS_TIM1_OCNIDLE_STATE_OK(STATE) (((STATE) == TIM1_OCNIDLESTATE_SET) || \
|
||||
((STATE) == TIM1_OCNIDLESTATE_RESET))
|
||||
|
||||
/** TIM1 Input Capture Polarity */
|
||||
typedef enum
|
||||
{
|
||||
TIM1_ICPOLARITY_RISING = ((uint8_t)0x00),
|
||||
TIM1_ICPOLARITY_FALLING = ((uint8_t)0x01)
|
||||
}TIM1_ICPolarity_TypeDef;
|
||||
|
||||
#define IS_TIM1_IC_POLARITY_OK(POLARITY) (((POLARITY) == TIM1_ICPOLARITY_RISING) || \
|
||||
((POLARITY) == TIM1_ICPOLARITY_FALLING))
|
||||
|
||||
/** TIM1 Input Capture Selection */
|
||||
typedef enum
|
||||
{
|
||||
TIM1_ICSELECTION_DIRECTTI = ((uint8_t)0x01),
|
||||
TIM1_ICSELECTION_INDIRECTTI = ((uint8_t)0x02),
|
||||
TIM1_ICSELECTION_TRGI = ((uint8_t)0x03)
|
||||
}TIM1_ICSelection_TypeDef;
|
||||
|
||||
#define IS_TIM1_IC_SELECTION_OK(SELECTION) (((SELECTION) == TIM1_ICSELECTION_DIRECTTI) || \
|
||||
((SELECTION) == TIM1_ICSELECTION_INDIRECTTI) || \
|
||||
((SELECTION) == TIM1_ICSELECTION_TRGI))
|
||||
|
||||
/** TIM1 Input Capture Prescaler */
|
||||
typedef enum
|
||||
{
|
||||
TIM1_ICPSC_DIV1 = ((uint8_t)0x00),
|
||||
TIM1_ICPSC_DIV2 = ((uint8_t)0x04),
|
||||
TIM1_ICPSC_DIV4 = ((uint8_t)0x08),
|
||||
TIM1_ICPSC_DIV8 = ((uint8_t)0x0C)
|
||||
}TIM1_ICPSC_TypeDef;
|
||||
|
||||
#define IS_TIM1_IC_PRESCALER_OK(PRESCALER) (((PRESCALER) == TIM1_ICPSC_DIV1) || \
|
||||
((PRESCALER) == TIM1_ICPSC_DIV2) || \
|
||||
((PRESCALER) == TIM1_ICPSC_DIV4) || \
|
||||
((PRESCALER) == TIM1_ICPSC_DIV8))
|
||||
|
||||
/** TIM1 Input Capture Filer Value */
|
||||
|
||||
#define IS_TIM1_IC_FILTER_OK(ICFILTER) ((ICFILTER) <= 0x0F)
|
||||
|
||||
/** TIM1 External Trigger Filer Value */
|
||||
#define IS_TIM1_EXT_TRG_FILTER_OK(FILTER) ((FILTER) <= 0x0F)
|
||||
|
||||
/** TIM1 interrupt sources */
|
||||
typedef enum
|
||||
{
|
||||
TIM1_IT_UPDATE = ((uint8_t)0x01),
|
||||
TIM1_IT_CC1 = ((uint8_t)0x02),
|
||||
TIM1_IT_CC2 = ((uint8_t)0x04),
|
||||
TIM1_IT_CC3 = ((uint8_t)0x08),
|
||||
TIM1_IT_CC4 = ((uint8_t)0x10),
|
||||
TIM1_IT_COM = ((uint8_t)0x20),
|
||||
TIM1_IT_TRIGGER = ((uint8_t)0x40),
|
||||
TIM1_IT_BREAK = ((uint8_t)0x80)
|
||||
}TIM1_IT_TypeDef;
|
||||
|
||||
#define IS_TIM1_IT_OK(IT) ((IT) != 0x00)
|
||||
|
||||
#define IS_TIM1_GET_IT_OK(IT) (((IT) == TIM1_IT_UPDATE) || \
|
||||
((IT) == TIM1_IT_CC1) || \
|
||||
((IT) == TIM1_IT_CC2) || \
|
||||
((IT) == TIM1_IT_CC3) || \
|
||||
((IT) == TIM1_IT_CC4) || \
|
||||
((IT) == TIM1_IT_COM) || \
|
||||
((IT) == TIM1_IT_TRIGGER) || \
|
||||
((IT) == TIM1_IT_BREAK))
|
||||
|
||||
|
||||
/** TIM1 External Trigger Prescaler */
|
||||
typedef enum
|
||||
{
|
||||
TIM1_EXTTRGPSC_OFF = ((uint8_t)0x00),
|
||||
TIM1_EXTTRGPSC_DIV2 = ((uint8_t)0x10),
|
||||
TIM1_EXTTRGPSC_DIV4 = ((uint8_t)0x20),
|
||||
TIM1_EXTTRGPSC_DIV8 = ((uint8_t)0x30)
|
||||
}TIM1_ExtTRGPSC_TypeDef;
|
||||
|
||||
#define IS_TIM1_EXT_PRESCALER_OK(PRESCALER) (((PRESCALER) == TIM1_EXTTRGPSC_OFF) || \
|
||||
((PRESCALER) == TIM1_EXTTRGPSC_DIV2) || \
|
||||
((PRESCALER) == TIM1_EXTTRGPSC_DIV4) || \
|
||||
((PRESCALER) == TIM1_EXTTRGPSC_DIV8))
|
||||
|
||||
/** TIM1 Internal Trigger Selection */
|
||||
typedef enum
|
||||
{
|
||||
TIM1_TS_TIM6 = ((uint8_t)0x00), /*!< TRIG Input source = TIM6 TRIG Output */
|
||||
TIM1_TS_TIM5 = ((uint8_t)0x30), /*!< TRIG Input source = TIM5 TRIG Output */
|
||||
TIM1_TS_TI1F_ED = ((uint8_t)0x40),
|
||||
TIM1_TS_TI1FP1 = ((uint8_t)0x50),
|
||||
TIM1_TS_TI2FP2 = ((uint8_t)0x60),
|
||||
TIM1_TS_ETRF = ((uint8_t)0x70)
|
||||
}TIM1_TS_TypeDef;
|
||||
|
||||
#define IS_TIM1_TRIGGER_SELECTION_OK(SELECTION) (((SELECTION) == TIM1_TS_TI1F_ED) || \
|
||||
((SELECTION) == TIM1_TS_TI1FP1) || \
|
||||
((SELECTION) == TIM1_TS_TI2FP2) || \
|
||||
((SELECTION) == TIM1_TS_ETRF) || \
|
||||
((SELECTION) == TIM1_TS_TIM5) || \
|
||||
((SELECTION) == TIM1_TS_TIM6))
|
||||
|
||||
|
||||
#define IS_TIM1_TIX_TRIGGER_SELECTION_OK(SELECTION) (((SELECTION) == TIM1_TS_TI1F_ED) || \
|
||||
((SELECTION) == TIM1_TS_TI1FP1) || \
|
||||
((SELECTION) == TIM1_TS_TI2FP2))
|
||||
|
||||
/** TIM1 TIx External Clock Source */
|
||||
typedef enum
|
||||
{
|
||||
TIM1_TIXEXTERNALCLK1SOURCE_TI1ED = ((uint8_t)0x40),
|
||||
TIM1_TIXEXTERNALCLK1SOURCE_TI1 = ((uint8_t)0x50),
|
||||
TIM1_TIXEXTERNALCLK1SOURCE_TI2 = ((uint8_t)0x60)
|
||||
}TIM1_TIxExternalCLK1Source_TypeDef;
|
||||
|
||||
#define IS_TIM1_TIXCLK_SOURCE_OK(SOURCE) (((SOURCE) == TIM1_TIXEXTERNALCLK1SOURCE_TI1ED) || \
|
||||
((SOURCE) == TIM1_TIXEXTERNALCLK1SOURCE_TI2) || \
|
||||
((SOURCE) == TIM1_TIXEXTERNALCLK1SOURCE_TI1))
|
||||
|
||||
/** TIM1 External Trigger Polarity */
|
||||
typedef enum
|
||||
{
|
||||
TIM1_EXTTRGPOLARITY_INVERTED = ((uint8_t)0x80),
|
||||
TIM1_EXTTRGPOLARITY_NONINVERTED = ((uint8_t)0x00)
|
||||
}TIM1_ExtTRGPolarity_TypeDef;
|
||||
|
||||
#define IS_TIM1_EXT_POLARITY_OK(POLARITY) (((POLARITY) == TIM1_EXTTRGPOLARITY_INVERTED) || \
|
||||
((POLARITY) == TIM1_EXTTRGPOLARITY_NONINVERTED))
|
||||
|
||||
/** TIM1 Prescaler Reload Mode */
|
||||
typedef enum
|
||||
{
|
||||
TIM1_PSCRELOADMODE_UPDATE = ((uint8_t)0x00),
|
||||
TIM1_PSCRELOADMODE_IMMEDIATE = ((uint8_t)0x01)
|
||||
}TIM1_PSCReloadMode_TypeDef;
|
||||
|
||||
#define IS_TIM1_PRESCALER_RELOAD_OK(RELOAD) (((RELOAD) == TIM1_PSCRELOADMODE_UPDATE) || \
|
||||
((RELOAD) == TIM1_PSCRELOADMODE_IMMEDIATE))
|
||||
|
||||
/** TIM1 Encoder Mode */
|
||||
typedef enum
|
||||
{
|
||||
TIM1_ENCODERMODE_TI1 = ((uint8_t)0x01),
|
||||
TIM1_ENCODERMODE_TI2 = ((uint8_t)0x02),
|
||||
TIM1_ENCODERMODE_TI12 = ((uint8_t)0x03)
|
||||
}TIM1_EncoderMode_TypeDef;
|
||||
|
||||
#define IS_TIM1_ENCODER_MODE_OK(MODE) (((MODE) == TIM1_ENCODERMODE_TI1) || \
|
||||
((MODE) == TIM1_ENCODERMODE_TI2) || \
|
||||
((MODE) == TIM1_ENCODERMODE_TI12))
|
||||
|
||||
/** TIM1 Event Source */
|
||||
typedef enum
|
||||
{
|
||||
TIM1_EVENTSOURCE_UPDATE = ((uint8_t)0x01),
|
||||
TIM1_EVENTSOURCE_CC1 = ((uint8_t)0x02),
|
||||
TIM1_EVENTSOURCE_CC2 = ((uint8_t)0x04),
|
||||
TIM1_EVENTSOURCE_CC3 = ((uint8_t)0x08),
|
||||
TIM1_EVENTSOURCE_CC4 = ((uint8_t)0x10),
|
||||
TIM1_EVENTSOURCE_COM = ((uint8_t)0x20),
|
||||
TIM1_EVENTSOURCE_TRIGGER = ((uint8_t)0x40),
|
||||
TIM1_EVENTSOURCE_BREAK = ((uint8_t)0x80)
|
||||
}TIM1_EventSource_TypeDef;
|
||||
|
||||
#define IS_TIM1_EVENT_SOURCE_OK(SOURCE) ((SOURCE) != 0x00)
|
||||
|
||||
/** TIM1 Update Source */
|
||||
typedef enum
|
||||
{
|
||||
TIM1_UPDATESOURCE_GLOBAL = ((uint8_t)0x00),
|
||||
TIM1_UPDATESOURCE_REGULAR = ((uint8_t)0x01)
|
||||
}TIM1_UpdateSource_TypeDef;
|
||||
|
||||
#define IS_TIM1_UPDATE_SOURCE_OK(SOURCE) (((SOURCE) == TIM1_UPDATESOURCE_GLOBAL) || \
|
||||
((SOURCE) == TIM1_UPDATESOURCE_REGULAR))
|
||||
|
||||
/** TIM1 Trigger Output Source */
|
||||
typedef enum
|
||||
{
|
||||
TIM1_TRGOSOURCE_RESET = ((uint8_t)0x00),
|
||||
TIM1_TRGOSOURCE_ENABLE = ((uint8_t)0x10),
|
||||
TIM1_TRGOSOURCE_UPDATE = ((uint8_t)0x20),
|
||||
TIM1_TRGOSource_OC1 = ((uint8_t)0x30),
|
||||
TIM1_TRGOSOURCE_OC1REF = ((uint8_t)0x40),
|
||||
TIM1_TRGOSOURCE_OC2REF = ((uint8_t)0x50),
|
||||
TIM1_TRGOSOURCE_OC3REF = ((uint8_t)0x60)
|
||||
}TIM1_TRGOSource_TypeDef;
|
||||
|
||||
#define IS_TIM1_TRGO_SOURCE_OK(SOURCE) (((SOURCE) == TIM1_TRGOSOURCE_RESET) || \
|
||||
((SOURCE) == TIM1_TRGOSOURCE_ENABLE) || \
|
||||
((SOURCE) == TIM1_TRGOSOURCE_UPDATE) || \
|
||||
((SOURCE) == TIM1_TRGOSource_OC1) || \
|
||||
((SOURCE) == TIM1_TRGOSOURCE_OC1REF) || \
|
||||
((SOURCE) == TIM1_TRGOSOURCE_OC2REF) || \
|
||||
((SOURCE) == TIM1_TRGOSOURCE_OC3REF))
|
||||
|
||||
/** TIM1 Slave Mode */
|
||||
typedef enum
|
||||
{
|
||||
TIM1_SLAVEMODE_RESET = ((uint8_t)0x04),
|
||||
TIM1_SLAVEMODE_GATED = ((uint8_t)0x05),
|
||||
TIM1_SLAVEMODE_TRIGGER = ((uint8_t)0x06),
|
||||
TIM1_SLAVEMODE_EXTERNAL1 = ((uint8_t)0x07)
|
||||
}TIM1_SlaveMode_TypeDef;
|
||||
|
||||
#define IS_TIM1_SLAVE_MODE_OK(MODE) (((MODE) == TIM1_SLAVEMODE_RESET) || \
|
||||
((MODE) == TIM1_SLAVEMODE_GATED) || \
|
||||
((MODE) == TIM1_SLAVEMODE_TRIGGER) || \
|
||||
((MODE) == TIM1_SLAVEMODE_EXTERNAL1))
|
||||
|
||||
/** TIM1 Flags */
|
||||
typedef enum
|
||||
{
|
||||
TIM1_FLAG_UPDATE = ((uint16_t)0x0001),
|
||||
TIM1_FLAG_CC1 = ((uint16_t)0x0002),
|
||||
TIM1_FLAG_CC2 = ((uint16_t)0x0004),
|
||||
TIM1_FLAG_CC3 = ((uint16_t)0x0008),
|
||||
TIM1_FLAG_CC4 = ((uint16_t)0x0010),
|
||||
TIM1_FLAG_COM = ((uint16_t)0x0020),
|
||||
TIM1_FLAG_TRIGGER = ((uint16_t)0x0040),
|
||||
TIM1_FLAG_BREAK = ((uint16_t)0x0080),
|
||||
TIM1_FLAG_CC1OF = ((uint16_t)0x0200),
|
||||
TIM1_FLAG_CC2OF = ((uint16_t)0x0400),
|
||||
TIM1_FLAG_CC3OF = ((uint16_t)0x0800),
|
||||
TIM1_FLAG_CC4OF = ((uint16_t)0x1000)
|
||||
}TIM1_FLAG_TypeDef;
|
||||
|
||||
#define IS_TIM1_GET_FLAG_OK(FLAG) (((FLAG) == TIM1_FLAG_UPDATE) || \
|
||||
((FLAG) == TIM1_FLAG_CC1) || \
|
||||
((FLAG) == TIM1_FLAG_CC2) || \
|
||||
((FLAG) == TIM1_FLAG_CC3) || \
|
||||
((FLAG) == TIM1_FLAG_CC4) || \
|
||||
((FLAG) == TIM1_FLAG_COM) || \
|
||||
((FLAG) == TIM1_FLAG_TRIGGER) || \
|
||||
((FLAG) == TIM1_FLAG_BREAK) || \
|
||||
((FLAG) == TIM1_FLAG_CC1OF) || \
|
||||
((FLAG) == TIM1_FLAG_CC2OF) || \
|
||||
((FLAG) == TIM1_FLAG_CC3OF) || \
|
||||
((FLAG) == TIM1_FLAG_CC4OF))
|
||||
|
||||
#define IS_TIM1_CLEAR_FLAG_OK(FLAG) ((((uint16_t)(FLAG) & (uint16_t)0xE100) == 0x0000) && ((FLAG) != 0x0000))
|
||||
|
||||
/** TIM1 Forced Action */
|
||||
typedef enum
|
||||
{
|
||||
TIM1_FORCEDACTION_ACTIVE = ((uint8_t)0x50),
|
||||
TIM1_FORCEDACTION_INACTIVE = ((uint8_t)0x40)
|
||||
}TIM1_ForcedAction_TypeDef;
|
||||
|
||||
#define IS_TIM1_FORCED_ACTION_OK(ACTION) (((ACTION) == TIM1_FORCEDACTION_ACTIVE) || \
|
||||
((ACTION) == TIM1_FORCEDACTION_INACTIVE))
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/* Exported macro ------------------------------------------------------------*/
|
||||
|
||||
/* Exported functions --------------------------------------------------------*/
|
||||
|
||||
/** @addtogroup TIM1_Exported_Functions
|
||||
* @{
|
||||
*/
|
||||
|
||||
void TIM1_DeInit(void);
|
||||
void TIM1_TimeBaseInit(uint16_t TIM1_Prescaler,
|
||||
TIM1_CounterMode_TypeDef TIM1_CounterMode,
|
||||
uint16_t TIM1_Period, uint8_t TIM1_RepetitionCounter);
|
||||
void TIM1_OC1Init(TIM1_OCMode_TypeDef TIM1_OCMode,
|
||||
TIM1_OutputState_TypeDef TIM1_OutputState,
|
||||
TIM1_OutputNState_TypeDef TIM1_OutputNState,
|
||||
uint16_t TIM1_Pulse, TIM1_OCPolarity_TypeDef TIM1_OCPolarity,
|
||||
TIM1_OCNPolarity_TypeDef TIM1_OCNPolarity,
|
||||
TIM1_OCIdleState_TypeDef TIM1_OCIdleState,
|
||||
TIM1_OCNIdleState_TypeDef TIM1_OCNIdleState);
|
||||
void TIM1_OC2Init(TIM1_OCMode_TypeDef TIM1_OCMode,
|
||||
TIM1_OutputState_TypeDef TIM1_OutputState,
|
||||
TIM1_OutputNState_TypeDef TIM1_OutputNState,
|
||||
uint16_t TIM1_Pulse, TIM1_OCPolarity_TypeDef TIM1_OCPolarity,
|
||||
TIM1_OCNPolarity_TypeDef TIM1_OCNPolarity,
|
||||
TIM1_OCIdleState_TypeDef TIM1_OCIdleState,
|
||||
TIM1_OCNIdleState_TypeDef TIM1_OCNIdleState);
|
||||
void TIM1_OC3Init(TIM1_OCMode_TypeDef TIM1_OCMode,
|
||||
TIM1_OutputState_TypeDef TIM1_OutputState,
|
||||
TIM1_OutputNState_TypeDef TIM1_OutputNState,
|
||||
uint16_t TIM1_Pulse, TIM1_OCPolarity_TypeDef TIM1_OCPolarity,
|
||||
TIM1_OCNPolarity_TypeDef TIM1_OCNPolarity,
|
||||
TIM1_OCIdleState_TypeDef TIM1_OCIdleState,
|
||||
TIM1_OCNIdleState_TypeDef TIM1_OCNIdleState);
|
||||
void TIM1_OC4Init(TIM1_OCMode_TypeDef TIM1_OCMode,
|
||||
TIM1_OutputState_TypeDef TIM1_OutputState, uint16_t TIM1_Pulse,
|
||||
TIM1_OCPolarity_TypeDef TIM1_OCPolarity,
|
||||
TIM1_OCIdleState_TypeDef TIM1_OCIdleState);
|
||||
void TIM1_BDTRConfig(TIM1_OSSIState_TypeDef TIM1_OSSIState,
|
||||
TIM1_LockLevel_TypeDef TIM1_LockLevel, uint8_t TIM1_DeadTime,
|
||||
TIM1_BreakState_TypeDef TIM1_Break,
|
||||
TIM1_BreakPolarity_TypeDef TIM1_BreakPolarity,
|
||||
TIM1_AutomaticOutput_TypeDef TIM1_AutomaticOutput);
|
||||
void TIM1_ICInit(TIM1_Channel_TypeDef TIM1_Channel,
|
||||
TIM1_ICPolarity_TypeDef TIM1_ICPolarity,
|
||||
TIM1_ICSelection_TypeDef TIM1_ICSelection,
|
||||
TIM1_ICPSC_TypeDef TIM1_ICPrescaler, uint8_t TIM1_ICFilter);
|
||||
void TIM1_PWMIConfig(TIM1_Channel_TypeDef TIM1_Channel,
|
||||
TIM1_ICPolarity_TypeDef TIM1_ICPolarity,
|
||||
TIM1_ICSelection_TypeDef TIM1_ICSelection,
|
||||
TIM1_ICPSC_TypeDef TIM1_ICPrescaler, uint8_t TIM1_ICFilter);
|
||||
void TIM1_Cmd(FunctionalState NewState);
|
||||
void TIM1_CtrlPWMOutputs(FunctionalState NewState);
|
||||
void TIM1_ITConfig(TIM1_IT_TypeDef TIM1_IT, FunctionalState NewState);
|
||||
void TIM1_InternalClockConfig(void);
|
||||
void TIM1_ETRClockMode1Config(TIM1_ExtTRGPSC_TypeDef TIM1_ExtTRGPrescaler,
|
||||
TIM1_ExtTRGPolarity_TypeDef TIM1_ExtTRGPolarity,
|
||||
uint8_t ExtTRGFilter);
|
||||
void TIM1_ETRClockMode2Config(TIM1_ExtTRGPSC_TypeDef TIM1_ExtTRGPrescaler,
|
||||
TIM1_ExtTRGPolarity_TypeDef TIM1_ExtTRGPolarity,
|
||||
uint8_t ExtTRGFilter);
|
||||
void TIM1_ETRConfig(TIM1_ExtTRGPSC_TypeDef TIM1_ExtTRGPrescaler,
|
||||
TIM1_ExtTRGPolarity_TypeDef TIM1_ExtTRGPolarity,
|
||||
uint8_t ExtTRGFilter);
|
||||
void TIM1_TIxExternalClockConfig(TIM1_TIxExternalCLK1Source_TypeDef TIM1_TIxExternalCLKSource,
|
||||
TIM1_ICPolarity_TypeDef TIM1_ICPolarity,
|
||||
uint8_t ICFilter);
|
||||
void TIM1_SelectInputTrigger(TIM1_TS_TypeDef TIM1_InputTriggerSource);
|
||||
void TIM1_UpdateDisableConfig(FunctionalState NewState);
|
||||
void TIM1_UpdateRequestConfig(TIM1_UpdateSource_TypeDef TIM1_UpdateSource);
|
||||
void TIM1_SelectHallSensor(FunctionalState NewState);
|
||||
void TIM1_SelectOnePulseMode(TIM1_OPMode_TypeDef TIM1_OPMode);
|
||||
void TIM1_SelectOutputTrigger(TIM1_TRGOSource_TypeDef TIM1_TRGOSource);
|
||||
void TIM1_SelectSlaveMode(TIM1_SlaveMode_TypeDef TIM1_SlaveMode);
|
||||
void TIM1_SelectMasterSlaveMode(FunctionalState NewState);
|
||||
void TIM1_EncoderInterfaceConfig(TIM1_EncoderMode_TypeDef TIM1_EncoderMode,
|
||||
TIM1_ICPolarity_TypeDef TIM1_IC1Polarity,
|
||||
TIM1_ICPolarity_TypeDef TIM1_IC2Polarity);
|
||||
void TIM1_PrescalerConfig(uint16_t Prescaler, TIM1_PSCReloadMode_TypeDef TIM1_PSCReloadMode);
|
||||
void TIM1_CounterModeConfig(TIM1_CounterMode_TypeDef TIM1_CounterMode);
|
||||
void TIM1_ForcedOC1Config(TIM1_ForcedAction_TypeDef TIM1_ForcedAction);
|
||||
void TIM1_ForcedOC2Config(TIM1_ForcedAction_TypeDef TIM1_ForcedAction);
|
||||
void TIM1_ForcedOC3Config(TIM1_ForcedAction_TypeDef TIM1_ForcedAction);
|
||||
void TIM1_ForcedOC4Config(TIM1_ForcedAction_TypeDef TIM1_ForcedAction);
|
||||
void TIM1_ARRPreloadConfig(FunctionalState NewState);
|
||||
void TIM1_SelectCOM(FunctionalState NewState);
|
||||
void TIM1_CCPreloadControl(FunctionalState NewState);
|
||||
void TIM1_OC1PreloadConfig(FunctionalState NewState);
|
||||
void TIM1_OC2PreloadConfig(FunctionalState NewState);
|
||||
void TIM1_OC3PreloadConfig(FunctionalState NewState);
|
||||
void TIM1_OC4PreloadConfig(FunctionalState NewState);
|
||||
void TIM1_OC1FastConfig(FunctionalState NewState);
|
||||
void TIM1_OC2FastConfig(FunctionalState NewState);
|
||||
void TIM1_OC3FastConfig(FunctionalState NewState);
|
||||
void TIM1_OC4FastConfig(FunctionalState NewState);
|
||||
void TIM1_GenerateEvent(TIM1_EventSource_TypeDef TIM1_EventSource);
|
||||
void TIM1_OC1PolarityConfig(TIM1_OCPolarity_TypeDef TIM1_OCPolarity);
|
||||
void TIM1_OC1NPolarityConfig(TIM1_OCNPolarity_TypeDef TIM1_OCNPolarity);
|
||||
void TIM1_OC2PolarityConfig(TIM1_OCPolarity_TypeDef TIM1_OCPolarity);
|
||||
void TIM1_OC2NPolarityConfig(TIM1_OCNPolarity_TypeDef TIM1_OCNPolarity);
|
||||
void TIM1_OC3PolarityConfig(TIM1_OCPolarity_TypeDef TIM1_OCPolarity);
|
||||
void TIM1_OC3NPolarityConfig(TIM1_OCNPolarity_TypeDef TIM1_OCNPolarity);
|
||||
void TIM1_OC4PolarityConfig(TIM1_OCPolarity_TypeDef TIM1_OCPolarity);
|
||||
void TIM1_CCxCmd(TIM1_Channel_TypeDef TIM1_Channel, FunctionalState NewState);
|
||||
void TIM1_CCxNCmd(TIM1_Channel_TypeDef TIM1_Channel, FunctionalState NewState);
|
||||
void TIM1_SelectOCxM(TIM1_Channel_TypeDef TIM1_Channel, TIM1_OCMode_TypeDef TIM1_OCMode);
|
||||
void TIM1_SetCounter(uint16_t Counter);
|
||||
void TIM1_SetAutoreload(uint16_t Autoreload);
|
||||
void TIM1_SetCompare1(uint16_t Compare1);
|
||||
void TIM1_SetCompare2(uint16_t Compare2);
|
||||
void TIM1_SetCompare3(uint16_t Compare3);
|
||||
void TIM1_SetCompare4(uint16_t Compare4);
|
||||
void TIM1_SetIC1Prescaler(TIM1_ICPSC_TypeDef TIM1_IC1Prescaler);
|
||||
void TIM1_SetIC2Prescaler(TIM1_ICPSC_TypeDef TIM1_IC2Prescaler);
|
||||
void TIM1_SetIC3Prescaler(TIM1_ICPSC_TypeDef TIM1_IC3Prescaler);
|
||||
void TIM1_SetIC4Prescaler(TIM1_ICPSC_TypeDef TIM1_IC4Prescaler);
|
||||
uint16_t TIM1_GetCapture1(void);
|
||||
uint16_t TIM1_GetCapture2(void);
|
||||
uint16_t TIM1_GetCapture3(void);
|
||||
uint16_t TIM1_GetCapture4(void);
|
||||
uint16_t TIM1_GetCounter(void);
|
||||
uint16_t TIM1_GetPrescaler(void);
|
||||
FlagStatus TIM1_GetFlagStatus(TIM1_FLAG_TypeDef TIM1_FLAG);
|
||||
void TIM1_ClearFlag(TIM1_FLAG_TypeDef TIM1_FLAG);
|
||||
ITStatus TIM1_GetITStatus(TIM1_IT_TypeDef TIM1_IT);
|
||||
void TIM1_ClearITPendingBit(TIM1_IT_TypeDef TIM1_IT);
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
#endif /* __STM8S_TIM1_H */
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
|
||||
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
|
||||
337
Serial/inc/stm8s_tim2.h
Normal file
337
Serial/inc/stm8s_tim2.h
Normal file
@@ -0,0 +1,337 @@
|
||||
/**
|
||||
******************************************************************************
|
||||
* @file stm8s_tim2.h
|
||||
* @author MCD Application Team
|
||||
* @version V2.3.0
|
||||
* @date 16-June-2017
|
||||
* @brief This file contains all functions prototype and macros for the TIM2 peripheral.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© COPYRIGHT 2014 STMicroelectronics</center></h2>
|
||||
*
|
||||
* Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
|
||||
* You may not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at:
|
||||
*
|
||||
* http://www.st.com/software_license_agreement_liberty_v2
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an "AS IS" BASIS,
|
||||
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
/* Define to prevent recursive inclusion -------------------------------------*/
|
||||
#ifndef __STM8S_TIM2_H
|
||||
#define __STM8S_TIM2_H
|
||||
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
#include "stm8s.h"
|
||||
|
||||
/** @addtogroup STM8S_StdPeriph_Driver
|
||||
* @{
|
||||
*/
|
||||
|
||||
/* Exported types ------------------------------------------------------------*/
|
||||
|
||||
|
||||
/** TIM2 Forced Action */
|
||||
typedef enum
|
||||
{
|
||||
TIM2_FORCEDACTION_ACTIVE = ((uint8_t)0x50),
|
||||
TIM2_FORCEDACTION_INACTIVE = ((uint8_t)0x40)
|
||||
}TIM2_ForcedAction_TypeDef;
|
||||
|
||||
#define IS_TIM2_FORCED_ACTION_OK(ACTION) (((ACTION) == TIM2_FORCEDACTION_ACTIVE) || \
|
||||
((ACTION) == TIM2_FORCEDACTION_INACTIVE))
|
||||
|
||||
/** TIM2 Prescaler */
|
||||
typedef enum
|
||||
{
|
||||
TIM2_PRESCALER_1 = ((uint8_t)0x00),
|
||||
TIM2_PRESCALER_2 = ((uint8_t)0x01),
|
||||
TIM2_PRESCALER_4 = ((uint8_t)0x02),
|
||||
TIM2_PRESCALER_8 = ((uint8_t)0x03),
|
||||
TIM2_PRESCALER_16 = ((uint8_t)0x04),
|
||||
TIM2_PRESCALER_32 = ((uint8_t)0x05),
|
||||
TIM2_PRESCALER_64 = ((uint8_t)0x06),
|
||||
TIM2_PRESCALER_128 = ((uint8_t)0x07),
|
||||
TIM2_PRESCALER_256 = ((uint8_t)0x08),
|
||||
TIM2_PRESCALER_512 = ((uint8_t)0x09),
|
||||
TIM2_PRESCALER_1024 = ((uint8_t)0x0A),
|
||||
TIM2_PRESCALER_2048 = ((uint8_t)0x0B),
|
||||
TIM2_PRESCALER_4096 = ((uint8_t)0x0C),
|
||||
TIM2_PRESCALER_8192 = ((uint8_t)0x0D),
|
||||
TIM2_PRESCALER_16384 = ((uint8_t)0x0E),
|
||||
TIM2_PRESCALER_32768 = ((uint8_t)0x0F)
|
||||
}TIM2_Prescaler_TypeDef;
|
||||
|
||||
#define IS_TIM2_PRESCALER_OK(PRESCALER) (((PRESCALER) == TIM2_PRESCALER_1 ) || \
|
||||
((PRESCALER) == TIM2_PRESCALER_2 ) || \
|
||||
((PRESCALER) == TIM2_PRESCALER_4 ) || \
|
||||
((PRESCALER) == TIM2_PRESCALER_8 ) || \
|
||||
((PRESCALER) == TIM2_PRESCALER_16 ) || \
|
||||
((PRESCALER) == TIM2_PRESCALER_32 ) || \
|
||||
((PRESCALER) == TIM2_PRESCALER_64 ) || \
|
||||
((PRESCALER) == TIM2_PRESCALER_128 ) || \
|
||||
((PRESCALER) == TIM2_PRESCALER_256 ) || \
|
||||
((PRESCALER) == TIM2_PRESCALER_512 ) || \
|
||||
((PRESCALER) == TIM2_PRESCALER_1024 ) || \
|
||||
((PRESCALER) == TIM2_PRESCALER_2048 ) || \
|
||||
((PRESCALER) == TIM2_PRESCALER_4096 ) || \
|
||||
((PRESCALER) == TIM2_PRESCALER_8192 ) || \
|
||||
((PRESCALER) == TIM2_PRESCALER_16384 ) || \
|
||||
((PRESCALER) == TIM2_PRESCALER_32768 ))
|
||||
|
||||
/** TIM2 Output Compare and PWM modes */
|
||||
typedef enum
|
||||
{
|
||||
TIM2_OCMODE_TIMING = ((uint8_t)0x00),
|
||||
TIM2_OCMODE_ACTIVE = ((uint8_t)0x10),
|
||||
TIM2_OCMODE_INACTIVE = ((uint8_t)0x20),
|
||||
TIM2_OCMODE_TOGGLE = ((uint8_t)0x30),
|
||||
TIM2_OCMODE_PWM1 = ((uint8_t)0x60),
|
||||
TIM2_OCMODE_PWM2 = ((uint8_t)0x70)
|
||||
}TIM2_OCMode_TypeDef;
|
||||
|
||||
#define IS_TIM2_OC_MODE_OK(MODE) (((MODE) == TIM2_OCMODE_TIMING) || \
|
||||
((MODE) == TIM2_OCMODE_ACTIVE) || \
|
||||
((MODE) == TIM2_OCMODE_INACTIVE) || \
|
||||
((MODE) == TIM2_OCMODE_TOGGLE)|| \
|
||||
((MODE) == TIM2_OCMODE_PWM1) || \
|
||||
((MODE) == TIM2_OCMODE_PWM2))
|
||||
|
||||
#define IS_TIM2_OCM_OK(MODE)(((MODE) == TIM2_OCMODE_TIMING) || \
|
||||
((MODE) == TIM2_OCMODE_ACTIVE) || \
|
||||
((MODE) == TIM2_OCMODE_INACTIVE) || \
|
||||
((MODE) == TIM2_OCMODE_TOGGLE)|| \
|
||||
((MODE) == TIM2_OCMODE_PWM1) || \
|
||||
((MODE) == TIM2_OCMODE_PWM2) || \
|
||||
((MODE) == (uint8_t)TIM2_FORCEDACTION_ACTIVE) || \
|
||||
((MODE) == (uint8_t)TIM2_FORCEDACTION_INACTIVE))
|
||||
|
||||
/** TIM2 One Pulse Mode */
|
||||
typedef enum
|
||||
{
|
||||
TIM2_OPMODE_SINGLE = ((uint8_t)0x01),
|
||||
TIM2_OPMODE_REPETITIVE = ((uint8_t)0x00)
|
||||
}TIM2_OPMode_TypeDef;
|
||||
|
||||
#define IS_TIM2_OPM_MODE_OK(MODE) (((MODE) == TIM2_OPMODE_SINGLE) || \
|
||||
((MODE) == TIM2_OPMODE_REPETITIVE))
|
||||
|
||||
/** TIM2 Channel */
|
||||
typedef enum
|
||||
{
|
||||
TIM2_CHANNEL_1 = ((uint8_t)0x00),
|
||||
TIM2_CHANNEL_2 = ((uint8_t)0x01),
|
||||
TIM2_CHANNEL_3 = ((uint8_t)0x02)
|
||||
}TIM2_Channel_TypeDef;
|
||||
|
||||
#define IS_TIM2_CHANNEL_OK(CHANNEL) (((CHANNEL) == TIM2_CHANNEL_1) || \
|
||||
((CHANNEL) == TIM2_CHANNEL_2) || \
|
||||
((CHANNEL) == TIM2_CHANNEL_3))
|
||||
|
||||
#define IS_TIM2_PWMI_CHANNEL_OK(CHANNEL) (((CHANNEL) == TIM2_CHANNEL_1) || \
|
||||
((CHANNEL) == TIM2_CHANNEL_2))
|
||||
|
||||
/** TIM2 Output Compare Polarity */
|
||||
typedef enum
|
||||
{
|
||||
TIM2_OCPOLARITY_HIGH = ((uint8_t)0x00),
|
||||
TIM2_OCPOLARITY_LOW = ((uint8_t)0x22)
|
||||
}TIM2_OCPolarity_TypeDef;
|
||||
|
||||
#define IS_TIM2_OC_POLARITY_OK(POLARITY) (((POLARITY) == TIM2_OCPOLARITY_HIGH) || \
|
||||
((POLARITY) == TIM2_OCPOLARITY_LOW))
|
||||
|
||||
/** TIM2 Output Compare states */
|
||||
typedef enum
|
||||
{
|
||||
TIM2_OUTPUTSTATE_DISABLE = ((uint8_t)0x00),
|
||||
TIM2_OUTPUTSTATE_ENABLE = ((uint8_t)0x11)
|
||||
}TIM2_OutputState_TypeDef;
|
||||
|
||||
#define IS_TIM2_OUTPUT_STATE_OK(STATE) (((STATE) == TIM2_OUTPUTSTATE_DISABLE) || \
|
||||
((STATE) == TIM2_OUTPUTSTATE_ENABLE))
|
||||
|
||||
/** TIM2 Input Capture Polarity */
|
||||
typedef enum
|
||||
{
|
||||
TIM2_ICPOLARITY_RISING = ((uint8_t)0x00),
|
||||
TIM2_ICPOLARITY_FALLING = ((uint8_t)0x44)
|
||||
}TIM2_ICPolarity_TypeDef;
|
||||
|
||||
#define IS_TIM2_IC_POLARITY_OK(POLARITY) (((POLARITY) == TIM2_ICPOLARITY_RISING) || \
|
||||
((POLARITY) == TIM2_ICPOLARITY_FALLING))
|
||||
|
||||
/** TIM2 Input Capture Selection */
|
||||
typedef enum
|
||||
{
|
||||
TIM2_ICSELECTION_DIRECTTI = ((uint8_t)0x01),
|
||||
TIM2_ICSELECTION_INDIRECTTI = ((uint8_t)0x02),
|
||||
TIM2_ICSELECTION_TRGI = ((uint8_t)0x03)
|
||||
}TIM2_ICSelection_TypeDef;
|
||||
|
||||
#define IS_TIM2_IC_SELECTION_OK(SELECTION) (((SELECTION) == TIM2_ICSELECTION_DIRECTTI) || \
|
||||
((SELECTION) == TIM2_ICSELECTION_INDIRECTTI) || \
|
||||
((SELECTION) == TIM2_ICSELECTION_TRGI))
|
||||
|
||||
#define IS_TIM2_IC_SELECTION1_OK(SELECTION) (((SELECTION) == TIM2_ICSELECTION_DIRECTTI) || \
|
||||
((SELECTION) == TIM2_ICSELECTION_TRGI))
|
||||
|
||||
/** TIM2 Input Capture Prescaler */
|
||||
typedef enum
|
||||
{
|
||||
TIM2_ICPSC_DIV1 = ((uint8_t)0x00),
|
||||
TIM2_ICPSC_DIV2 = ((uint8_t)0x04),
|
||||
TIM2_ICPSC_DIV4 = ((uint8_t)0x08),
|
||||
TIM2_ICPSC_DIV8 = ((uint8_t)0x0C)
|
||||
}TIM2_ICPSC_TypeDef;
|
||||
|
||||
#define IS_TIM2_IC_PRESCALER_OK(PRESCALER) (((PRESCALER) == TIM2_ICPSC_DIV1) || \
|
||||
((PRESCALER) == TIM2_ICPSC_DIV2) || \
|
||||
((PRESCALER) == TIM2_ICPSC_DIV4) || \
|
||||
((PRESCALER) == TIM2_ICPSC_DIV8))
|
||||
|
||||
/** TIM2 Input Capture Filer Value */
|
||||
#define IS_TIM2_IC_FILTER_OK(ICFILTER) ((ICFILTER) <= 0x0F)
|
||||
|
||||
/** TIM2 interrupt sources */
|
||||
typedef enum
|
||||
{
|
||||
TIM2_IT_UPDATE = ((uint8_t)0x01),
|
||||
TIM2_IT_CC1 = ((uint8_t)0x02),
|
||||
TIM2_IT_CC2 = ((uint8_t)0x04),
|
||||
TIM2_IT_CC3 = ((uint8_t)0x08)
|
||||
}TIM2_IT_TypeDef;
|
||||
|
||||
#define IS_TIM2_IT_OK(IT) (((IT) != 0x00) && ((IT) <= 0x0F))
|
||||
|
||||
#define IS_TIM2_GET_IT_OK(IT) (((IT) == TIM2_IT_UPDATE) || \
|
||||
((IT) == TIM2_IT_CC1) || \
|
||||
((IT) == TIM2_IT_CC2) || \
|
||||
((IT) == TIM2_IT_CC3))
|
||||
|
||||
/** TIM2 Prescaler Reload Mode */
|
||||
typedef enum
|
||||
{
|
||||
TIM2_PSCRELOADMODE_UPDATE = ((uint8_t)0x00),
|
||||
TIM2_PSCRELOADMODE_IMMEDIATE = ((uint8_t)0x01)
|
||||
}TIM2_PSCReloadMode_TypeDef;
|
||||
|
||||
#define IS_TIM2_PRESCALER_RELOAD_OK(RELOAD) (((RELOAD) == TIM2_PSCRELOADMODE_UPDATE) || \
|
||||
((RELOAD) == TIM2_PSCRELOADMODE_IMMEDIATE))
|
||||
|
||||
/** TIM2 Event Source */
|
||||
typedef enum
|
||||
{
|
||||
TIM2_EVENTSOURCE_UPDATE = ((uint8_t)0x01),
|
||||
TIM2_EVENTSOURCE_CC1 = ((uint8_t)0x02),
|
||||
TIM2_EVENTSOURCE_CC2 = ((uint8_t)0x04),
|
||||
TIM2_EVENTSOURCE_CC3 = ((uint8_t)0x08)
|
||||
}TIM2_EventSource_TypeDef;
|
||||
|
||||
#define IS_TIM2_EVENT_SOURCE_OK(SOURCE) (((SOURCE) != 0x00))
|
||||
|
||||
/** TIM2 Update Source */
|
||||
typedef enum
|
||||
{
|
||||
TIM2_UPDATESOURCE_GLOBAL = ((uint8_t)0x00),
|
||||
TIM2_UPDATESOURCE_REGULAR = ((uint8_t)0x01)
|
||||
}TIM2_UpdateSource_TypeDef;
|
||||
|
||||
#define IS_TIM2_UPDATE_SOURCE_OK(SOURCE) (((SOURCE) == TIM2_UPDATESOURCE_GLOBAL) || \
|
||||
((SOURCE) == TIM2_UPDATESOURCE_REGULAR))
|
||||
|
||||
/** TIM2 Flags */
|
||||
typedef enum
|
||||
{
|
||||
TIM2_FLAG_UPDATE = ((uint16_t)0x0001),
|
||||
TIM2_FLAG_CC1 = ((uint16_t)0x0002),
|
||||
TIM2_FLAG_CC2 = ((uint16_t)0x0004),
|
||||
TIM2_FLAG_CC3 = ((uint16_t)0x0008),
|
||||
TIM2_FLAG_CC1OF = ((uint16_t)0x0200),
|
||||
TIM2_FLAG_CC2OF = ((uint16_t)0x0400),
|
||||
TIM2_FLAG_CC3OF = ((uint16_t)0x0800)
|
||||
}TIM2_FLAG_TypeDef;
|
||||
|
||||
#define IS_TIM2_GET_FLAG_OK(FLAG) (((FLAG) == TIM2_FLAG_UPDATE) || \
|
||||
((FLAG) == TIM2_FLAG_CC1) || \
|
||||
((FLAG) == TIM2_FLAG_CC2) || \
|
||||
((FLAG) == TIM2_FLAG_CC3) || \
|
||||
((FLAG) == TIM2_FLAG_CC1OF) || \
|
||||
((FLAG) == TIM2_FLAG_CC2OF) || \
|
||||
((FLAG) == TIM2_FLAG_CC3OF))
|
||||
|
||||
#define IS_TIM2_CLEAR_FLAG_OK(FLAG) ((((uint16_t)(FLAG) & 0xF1F0) == 0x0000) && ((uint16_t)(FLAG) != 0x0000))
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/* Exported macro ------------------------------------------------------------*/
|
||||
|
||||
/* Exported functions --------------------------------------------------------*/
|
||||
|
||||
/** @addtogroup TIM2_Exported_Functions
|
||||
* @{
|
||||
*/
|
||||
|
||||
void TIM2_DeInit(void);
|
||||
void TIM2_TimeBaseInit(TIM2_Prescaler_TypeDef TIM2_Prescaler, uint16_t TIM2_Period);
|
||||
void TIM2_OC1Init(TIM2_OCMode_TypeDef TIM2_OCMode, TIM2_OutputState_TypeDef TIM2_OutputState, uint16_t TIM2_Pulse, TIM2_OCPolarity_TypeDef TIM2_OCPolarity);
|
||||
void TIM2_OC2Init(TIM2_OCMode_TypeDef TIM2_OCMode, TIM2_OutputState_TypeDef TIM2_OutputState, uint16_t TIM2_Pulse, TIM2_OCPolarity_TypeDef TIM2_OCPolarity);
|
||||
void TIM2_OC3Init(TIM2_OCMode_TypeDef TIM2_OCMode, TIM2_OutputState_TypeDef TIM2_OutputState, uint16_t TIM2_Pulse, TIM2_OCPolarity_TypeDef TIM2_OCPolarity);
|
||||
void TIM2_ICInit(TIM2_Channel_TypeDef TIM2_Channel, TIM2_ICPolarity_TypeDef TIM2_ICPolarity, TIM2_ICSelection_TypeDef TIM2_ICSelection, TIM2_ICPSC_TypeDef TIM2_ICPrescaler, uint8_t TIM2_ICFilter);
|
||||
void TIM2_PWMIConfig(TIM2_Channel_TypeDef TIM2_Channel, TIM2_ICPolarity_TypeDef TIM2_ICPolarity, TIM2_ICSelection_TypeDef TIM2_ICSelection, TIM2_ICPSC_TypeDef TIM2_ICPrescaler, uint8_t TIM2_ICFilter);
|
||||
void TIM2_Cmd(FunctionalState NewState);
|
||||
void TIM2_ITConfig(TIM2_IT_TypeDef TIM2_IT, FunctionalState NewState);
|
||||
void TIM2_InternalClockConfig(void);
|
||||
void TIM2_UpdateDisableConfig(FunctionalState NewState);
|
||||
void TIM2_UpdateRequestConfig(TIM2_UpdateSource_TypeDef TIM2_UpdateSource);
|
||||
void TIM2_SelectOnePulseMode(TIM2_OPMode_TypeDef TIM2_OPMode);
|
||||
void TIM2_PrescalerConfig(TIM2_Prescaler_TypeDef Prescaler, TIM2_PSCReloadMode_TypeDef TIM2_PSCReloadMode);
|
||||
void TIM2_ForcedOC1Config(TIM2_ForcedAction_TypeDef TIM2_ForcedAction);
|
||||
void TIM2_ForcedOC2Config(TIM2_ForcedAction_TypeDef TIM2_ForcedAction);
|
||||
void TIM2_ForcedOC3Config(TIM2_ForcedAction_TypeDef TIM2_ForcedAction);
|
||||
void TIM2_ARRPreloadConfig(FunctionalState NewState);
|
||||
void TIM2_CCPreloadControl(FunctionalState NewState);
|
||||
void TIM2_OC1PreloadConfig(FunctionalState NewState);
|
||||
void TIM2_OC2PreloadConfig(FunctionalState NewState);
|
||||
void TIM2_OC3PreloadConfig(FunctionalState NewState);
|
||||
void TIM2_GenerateEvent(TIM2_EventSource_TypeDef TIM2_EventSource);
|
||||
void TIM2_OC1PolarityConfig(TIM2_OCPolarity_TypeDef TIM2_OCPolarity);
|
||||
void TIM2_OC2PolarityConfig(TIM2_OCPolarity_TypeDef TIM2_OCPolarity);
|
||||
void TIM2_OC3PolarityConfig(TIM2_OCPolarity_TypeDef TIM2_OCPolarity);
|
||||
void TIM2_CCxCmd(TIM2_Channel_TypeDef TIM2_Channel, FunctionalState NewState);
|
||||
void TIM2_SelectOCxM(TIM2_Channel_TypeDef TIM2_Channel, TIM2_OCMode_TypeDef TIM2_OCMode);
|
||||
void TIM2_SetCounter(uint16_t Counter);
|
||||
void TIM2_SetAutoreload(uint16_t Autoreload);
|
||||
void TIM2_SetCompare1(uint16_t Compare1);
|
||||
void TIM2_SetCompare2(uint16_t Compare2);
|
||||
void TIM2_SetCompare3(uint16_t Compare3);
|
||||
void TIM2_SetIC1Prescaler(TIM2_ICPSC_TypeDef TIM2_IC1Prescaler);
|
||||
void TIM2_SetIC2Prescaler(TIM2_ICPSC_TypeDef TIM2_IC2Prescaler);
|
||||
void TIM2_SetIC3Prescaler(TIM2_ICPSC_TypeDef TIM2_IC3Prescaler);
|
||||
uint16_t TIM2_GetCapture1(void);
|
||||
uint16_t TIM2_GetCapture2(void);
|
||||
uint16_t TIM2_GetCapture3(void);
|
||||
uint16_t TIM2_GetCounter(void);
|
||||
TIM2_Prescaler_TypeDef TIM2_GetPrescaler(void);
|
||||
FlagStatus TIM2_GetFlagStatus(TIM2_FLAG_TypeDef TIM2_FLAG);
|
||||
void TIM2_ClearFlag(TIM2_FLAG_TypeDef TIM2_FLAG);
|
||||
ITStatus TIM2_GetITStatus(TIM2_IT_TypeDef TIM2_IT);
|
||||
void TIM2_ClearITPendingBit(TIM2_IT_TypeDef TIM2_IT);
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
#endif /* __STM8S_TIM2_H */
|
||||
|
||||
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
|
||||
327
Serial/inc/stm8s_tim3.h
Normal file
327
Serial/inc/stm8s_tim3.h
Normal file
@@ -0,0 +1,327 @@
|
||||
/**
|
||||
******************************************************************************
|
||||
* @file stm8s_tim3.h
|
||||
* @author MCD Application Team
|
||||
* @version V2.3.0
|
||||
* @date 16-June-2017
|
||||
* @brief This file contains all functions prototype and macros for the TIM3 peripheral.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© COPYRIGHT 2014 STMicroelectronics</center></h2>
|
||||
*
|
||||
* Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
|
||||
* You may not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at:
|
||||
*
|
||||
* http://www.st.com/software_license_agreement_liberty_v2
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an "AS IS" BASIS,
|
||||
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
/* Define to prevent recursive inclusion -------------------------------------*/
|
||||
#ifndef __STM8S_TIM3_H
|
||||
#define __STM8S_TIM3_H
|
||||
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
#include "stm8s.h"
|
||||
|
||||
/** @addtogroup STM8S_StdPeriph_Driver
|
||||
* @{
|
||||
*/
|
||||
|
||||
/* Exported types ------------------------------------------------------------*/
|
||||
|
||||
/** @addtogroup TIM3_Exported_Types
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** TIM3 Forced Action */
|
||||
typedef enum
|
||||
{
|
||||
TIM3_FORCEDACTION_ACTIVE = ((uint8_t)0x50),
|
||||
TIM3_FORCEDACTION_INACTIVE = ((uint8_t)0x40)
|
||||
} TIM3_ForcedAction_TypeDef;
|
||||
|
||||
#define IS_TIM3_FORCED_ACTION_OK(ACTION) (((ACTION) == TIM3_FORCEDACTION_ACTIVE) || \
|
||||
((ACTION) == TIM3_FORCEDACTION_INACTIVE))
|
||||
|
||||
/** TIM3 Prescaler */
|
||||
typedef enum
|
||||
{
|
||||
TIM3_PRESCALER_1 = ((uint8_t)0x00),
|
||||
TIM3_PRESCALER_2 = ((uint8_t)0x01),
|
||||
TIM3_PRESCALER_4 = ((uint8_t)0x02),
|
||||
TIM3_PRESCALER_8 = ((uint8_t)0x03),
|
||||
TIM3_PRESCALER_16 = ((uint8_t)0x04),
|
||||
TIM3_PRESCALER_32 = ((uint8_t)0x05),
|
||||
TIM3_PRESCALER_64 = ((uint8_t)0x06),
|
||||
TIM3_PRESCALER_128 = ((uint8_t)0x07),
|
||||
TIM3_PRESCALER_256 = ((uint8_t)0x08),
|
||||
TIM3_PRESCALER_512 = ((uint8_t)0x09),
|
||||
TIM3_PRESCALER_1024 = ((uint8_t)0x0A),
|
||||
TIM3_PRESCALER_2048 = ((uint8_t)0x0B),
|
||||
TIM3_PRESCALER_4096 = ((uint8_t)0x0C),
|
||||
TIM3_PRESCALER_8192 = ((uint8_t)0x0D),
|
||||
TIM3_PRESCALER_16384 = ((uint8_t)0x0E),
|
||||
TIM3_PRESCALER_32768 = ((uint8_t)0x0F)
|
||||
} TIM3_Prescaler_TypeDef;
|
||||
|
||||
#define IS_TIM3_PRESCALER_OK(PRESCALER) (((PRESCALER) == TIM3_PRESCALER_1 ) || \
|
||||
((PRESCALER) == TIM3_PRESCALER_2 ) || \
|
||||
((PRESCALER) == TIM3_PRESCALER_4 ) || \
|
||||
((PRESCALER) == TIM3_PRESCALER_8 ) || \
|
||||
((PRESCALER) == TIM3_PRESCALER_16 ) || \
|
||||
((PRESCALER) == TIM3_PRESCALER_32 ) || \
|
||||
((PRESCALER) == TIM3_PRESCALER_64 ) || \
|
||||
((PRESCALER) == TIM3_PRESCALER_128 ) || \
|
||||
((PRESCALER) == TIM3_PRESCALER_256 ) || \
|
||||
((PRESCALER) == TIM3_PRESCALER_512 ) || \
|
||||
((PRESCALER) == TIM3_PRESCALER_1024 ) || \
|
||||
((PRESCALER) == TIM3_PRESCALER_2048 ) || \
|
||||
((PRESCALER) == TIM3_PRESCALER_4096 ) || \
|
||||
((PRESCALER) == TIM3_PRESCALER_8192 ) || \
|
||||
((PRESCALER) == TIM3_PRESCALER_16384 ) || \
|
||||
((PRESCALER) == TIM3_PRESCALER_32768 ))
|
||||
|
||||
/** TIM3 Output Compare and PWM modes */
|
||||
typedef enum
|
||||
{
|
||||
TIM3_OCMODE_TIMING = ((uint8_t)0x00),
|
||||
TIM3_OCMODE_ACTIVE = ((uint8_t)0x10),
|
||||
TIM3_OCMODE_INACTIVE = ((uint8_t)0x20),
|
||||
TIM3_OCMODE_TOGGLE = ((uint8_t)0x30),
|
||||
TIM3_OCMODE_PWM1 = ((uint8_t)0x60),
|
||||
TIM3_OCMODE_PWM2 = ((uint8_t)0x70)
|
||||
} TIM3_OCMode_TypeDef;
|
||||
|
||||
#define IS_TIM3_OC_MODE_OK(MODE) (((MODE) == TIM3_OCMODE_TIMING) || \
|
||||
((MODE) == TIM3_OCMODE_ACTIVE) || \
|
||||
((MODE) == TIM3_OCMODE_INACTIVE) || \
|
||||
((MODE) == TIM3_OCMODE_TOGGLE)|| \
|
||||
((MODE) == TIM3_OCMODE_PWM1) || \
|
||||
((MODE) == TIM3_OCMODE_PWM2))
|
||||
|
||||
#define IS_TIM3_OCM_OK(MODE)(((MODE) == TIM3_OCMODE_TIMING) || \
|
||||
((MODE) == TIM3_OCMODE_ACTIVE) || \
|
||||
((MODE) == TIM3_OCMODE_INACTIVE) || \
|
||||
((MODE) == TIM3_OCMODE_TOGGLE)|| \
|
||||
((MODE) == TIM3_OCMODE_PWM1) || \
|
||||
((MODE) == TIM3_OCMODE_PWM2) || \
|
||||
((MODE) == (uint8_t)TIM3_FORCEDACTION_ACTIVE) || \
|
||||
((MODE) == (uint8_t)TIM3_FORCEDACTION_INACTIVE))
|
||||
|
||||
/** TIM3 One Pulse Mode */
|
||||
typedef enum
|
||||
{
|
||||
TIM3_OPMODE_SINGLE = ((uint8_t)0x01),
|
||||
TIM3_OPMODE_REPETITIVE = ((uint8_t)0x00)
|
||||
} TIM3_OPMode_TypeDef;
|
||||
|
||||
#define IS_TIM3_OPM_MODE_OK(MODE) (((MODE) == TIM3_OPMODE_SINGLE) || \
|
||||
((MODE) == TIM3_OPMODE_REPETITIVE))
|
||||
|
||||
/** TIM3 Channel */
|
||||
|
||||
typedef enum
|
||||
{
|
||||
TIM3_CHANNEL_1 = ((uint8_t)0x00),
|
||||
TIM3_CHANNEL_2 = ((uint8_t)0x01)
|
||||
} TIM3_Channel_TypeDef;
|
||||
|
||||
#define IS_TIM3_CHANNEL_OK(CHANNEL) (((CHANNEL) == TIM3_CHANNEL_1) || \
|
||||
((CHANNEL) == TIM3_CHANNEL_2))
|
||||
|
||||
#define IS_TIM3_PWMI_CHANNEL_OK(CHANNEL) (((CHANNEL) == TIM3_CHANNEL_1) || \
|
||||
((CHANNEL) == TIM3_CHANNEL_2))
|
||||
|
||||
/** TIM3 Output Compare Polarity */
|
||||
typedef enum
|
||||
{
|
||||
TIM3_OCPOLARITY_HIGH = ((uint8_t)0x00),
|
||||
TIM3_OCPOLARITY_LOW = ((uint8_t)0x22)
|
||||
} TIM3_OCPolarity_TypeDef;
|
||||
|
||||
#define IS_TIM3_OC_POLARITY_OK(POLARITY) (((POLARITY) == TIM3_OCPOLARITY_HIGH) || \
|
||||
((POLARITY) == TIM3_OCPOLARITY_LOW))
|
||||
|
||||
/** TIM3 Output Compare states */
|
||||
typedef enum
|
||||
{
|
||||
TIM3_OUTPUTSTATE_DISABLE = ((uint8_t)0x00),
|
||||
TIM3_OUTPUTSTATE_ENABLE = ((uint8_t)0x11)
|
||||
} TIM3_OutputState_TypeDef;
|
||||
|
||||
#define IS_TIM3_OUTPUT_STATE_OK(STATE) (((STATE) == TIM3_OUTPUTSTATE_DISABLE) || \
|
||||
((STATE) == TIM3_OUTPUTSTATE_ENABLE))
|
||||
|
||||
/** TIM3 Input Capture Polarity */
|
||||
typedef enum
|
||||
{
|
||||
TIM3_ICPOLARITY_RISING = ((uint8_t)0x00),
|
||||
TIM3_ICPOLARITY_FALLING = ((uint8_t)0x44)
|
||||
} TIM3_ICPolarity_TypeDef;
|
||||
|
||||
#define IS_TIM3_IC_POLARITY_OK(POLARITY) (((POLARITY) == TIM3_ICPOLARITY_RISING) || \
|
||||
((POLARITY) == TIM3_ICPOLARITY_FALLING))
|
||||
|
||||
/** TIM3 Input Capture Selection */
|
||||
typedef enum
|
||||
{
|
||||
TIM3_ICSELECTION_DIRECTTI = ((uint8_t)0x01),
|
||||
TIM3_ICSELECTION_INDIRECTTI = ((uint8_t)0x02),
|
||||
TIM3_ICSELECTION_TRGI = ((uint8_t)0x03)
|
||||
} TIM3_ICSelection_TypeDef;
|
||||
|
||||
#define IS_TIM3_IC_SELECTION_OK(SELECTION) (((SELECTION) == TIM3_ICSELECTION_DIRECTTI) || \
|
||||
((SELECTION) == TIM3_ICSELECTION_INDIRECTTI) || \
|
||||
((SELECTION) == TIM3_ICSELECTION_TRGI))
|
||||
|
||||
/** TIM3 Input Capture Prescaler */
|
||||
typedef enum
|
||||
{
|
||||
TIM3_ICPSC_DIV1 = ((uint8_t)0x00),
|
||||
TIM3_ICPSC_DIV2 = ((uint8_t)0x04),
|
||||
TIM3_ICPSC_DIV4 = ((uint8_t)0x08),
|
||||
TIM3_ICPSC_DIV8 = ((uint8_t)0x0C)
|
||||
} TIM3_ICPSC_TypeDef;
|
||||
|
||||
#define IS_TIM3_IC_PRESCALER_OK(PRESCALER) (((PRESCALER) == TIM3_ICPSC_DIV1) || \
|
||||
((PRESCALER) == TIM3_ICPSC_DIV2) || \
|
||||
((PRESCALER) == TIM3_ICPSC_DIV4) || \
|
||||
((PRESCALER) == TIM3_ICPSC_DIV8))
|
||||
|
||||
/** TIM3 Input Capture Filer Value */
|
||||
#define IS_TIM3_IC_FILTER_OK(ICFILTER) ((ICFILTER) <= 0x0F)
|
||||
|
||||
/** TIM3 interrupt sources */
|
||||
typedef enum
|
||||
{
|
||||
TIM3_IT_UPDATE = ((uint8_t)0x01),
|
||||
TIM3_IT_CC1 = ((uint8_t)0x02),
|
||||
TIM3_IT_CC2 = ((uint8_t)0x04)
|
||||
} TIM3_IT_TypeDef;
|
||||
|
||||
#define IS_TIM3_IT_OK(IT) (((IT) != 0x00) && ((IT) <= 0x07))
|
||||
|
||||
#define IS_TIM3_GET_IT_OK(IT) (((IT) == TIM3_IT_UPDATE) || \
|
||||
((IT) == TIM3_IT_CC1) || \
|
||||
((IT) == TIM3_IT_CC2))
|
||||
|
||||
/** TIM3 Prescaler Reload Mode */
|
||||
typedef enum
|
||||
{
|
||||
TIM3_PSCRELOADMODE_UPDATE = ((uint8_t)0x00),
|
||||
TIM3_PSCRELOADMODE_IMMEDIATE = ((uint8_t)0x01)
|
||||
} TIM3_PSCReloadMode_TypeDef;
|
||||
|
||||
#define IS_TIM3_PRESCALER_RELOAD_OK(RELOAD) (((RELOAD) == TIM3_PSCRELOADMODE_UPDATE) || \
|
||||
((RELOAD) == TIM3_PSCRELOADMODE_IMMEDIATE))
|
||||
|
||||
/** TIM3 Event Source */
|
||||
typedef enum
|
||||
{
|
||||
TIM3_EVENTSOURCE_UPDATE = ((uint8_t)0x01),
|
||||
TIM3_EVENTSOURCE_CC1 = ((uint8_t)0x02),
|
||||
TIM3_EVENTSOURCE_CC2 = ((uint8_t)0x04)
|
||||
} TIM3_EventSource_TypeDef;
|
||||
|
||||
#define IS_TIM3_EVENT_SOURCE_OK(SOURCE) (((SOURCE) != 0x00))
|
||||
|
||||
/** TIM3 Update Source */
|
||||
typedef enum
|
||||
{
|
||||
TIM3_UPDATESOURCE_GLOBAL = ((uint8_t)0x00),
|
||||
TIM3_UPDATESOURCE_REGULAR = ((uint8_t)0x01)
|
||||
} TIM3_UpdateSource_TypeDef;
|
||||
|
||||
#define IS_TIM3_UPDATE_SOURCE_OK(SOURCE) (((SOURCE) == TIM3_UPDATESOURCE_GLOBAL) || \
|
||||
((SOURCE) == TIM3_UPDATESOURCE_REGULAR))
|
||||
|
||||
/** TIM3 Flags */
|
||||
typedef enum
|
||||
{
|
||||
TIM3_FLAG_UPDATE = ((uint16_t)0x0001),
|
||||
TIM3_FLAG_CC1 = ((uint16_t)0x0002),
|
||||
TIM3_FLAG_CC2 = ((uint16_t)0x0004),
|
||||
TIM3_FLAG_CC1OF = ((uint16_t)0x0200),
|
||||
TIM3_FLAG_CC2OF = ((uint16_t)0x0400)
|
||||
} TIM3_FLAG_TypeDef;
|
||||
|
||||
#define IS_TIM3_GET_FLAG_OK(FLAG) (((FLAG) == TIM3_FLAG_UPDATE) || \
|
||||
((FLAG) == TIM3_FLAG_CC1) || \
|
||||
((FLAG) == TIM3_FLAG_CC2) || \
|
||||
((FLAG) == TIM3_FLAG_CC1OF) || \
|
||||
((FLAG) == TIM3_FLAG_CC2OF) )
|
||||
|
||||
#define IS_TIM3_CLEAR_FLAG_OK(FLAG) ((((uint16_t)(FLAG) & 0xF9F8) == 0x0000) && ((uint16_t)(FLAG)!= 0x0000))
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/* Exported macro ------------------------------------------------------------*/
|
||||
|
||||
/* Exported functions --------------------------------------------------------*/
|
||||
|
||||
/** @addtogroup TIM3_Exported_Functions
|
||||
* @{
|
||||
*/
|
||||
|
||||
void TIM3_DeInit(void);
|
||||
void TIM3_TimeBaseInit(TIM3_Prescaler_TypeDef TIM3_Prescaler, uint16_t TIM3_Period);
|
||||
void TIM3_OC1Init(TIM3_OCMode_TypeDef TIM3_OCMode, TIM3_OutputState_TypeDef TIM3_OutputState, uint16_t TIM3_Pulse, TIM3_OCPolarity_TypeDef TIM3_OCPolarity);
|
||||
void TIM3_OC2Init(TIM3_OCMode_TypeDef TIM3_OCMode, TIM3_OutputState_TypeDef TIM3_OutputState, uint16_t TIM3_Pulse, TIM3_OCPolarity_TypeDef TIM3_OCPolarity);
|
||||
void TIM3_ICInit(TIM3_Channel_TypeDef TIM3_Channel, TIM3_ICPolarity_TypeDef TIM3_ICPolarity, TIM3_ICSelection_TypeDef TIM3_ICSelection, TIM3_ICPSC_TypeDef TIM3_ICPrescaler, uint8_t TIM3_ICFilter);
|
||||
void TIM3_PWMIConfig(TIM3_Channel_TypeDef TIM3_Channel, TIM3_ICPolarity_TypeDef TIM3_ICPolarity, TIM3_ICSelection_TypeDef TIM3_ICSelection, TIM3_ICPSC_TypeDef TIM3_ICPrescaler, uint8_t TIM3_ICFilter);
|
||||
void TIM3_Cmd(FunctionalState NewState);
|
||||
void TIM3_ITConfig(TIM3_IT_TypeDef TIM3_IT, FunctionalState NewState);
|
||||
void TIM3_InternalClockConfig(void);
|
||||
void TIM3_UpdateDisableConfig(FunctionalState NewState);
|
||||
void TIM3_UpdateRequestConfig(TIM3_UpdateSource_TypeDef TIM3_UpdateSource);
|
||||
void TIM3_SelectOnePulseMode(TIM3_OPMode_TypeDef TIM3_OPMode);
|
||||
void TIM3_PrescalerConfig(TIM3_Prescaler_TypeDef Prescaler, TIM3_PSCReloadMode_TypeDef TIM3_PSCReloadMode);
|
||||
void TIM3_ForcedOC1Config(TIM3_ForcedAction_TypeDef TIM3_ForcedAction);
|
||||
void TIM3_ForcedOC2Config(TIM3_ForcedAction_TypeDef TIM3_ForcedAction);
|
||||
void TIM3_ARRPreloadConfig(FunctionalState NewState);
|
||||
void TIM3_CCPreloadControl(FunctionalState NewState);
|
||||
void TIM3_OC1PreloadConfig(FunctionalState NewState);
|
||||
void TIM3_OC2PreloadConfig(FunctionalState NewState);
|
||||
void TIM3_GenerateEvent(TIM3_EventSource_TypeDef TIM3_EventSource);
|
||||
void TIM3_OC1PolarityConfig(TIM3_OCPolarity_TypeDef TIM3_OCPolarity);
|
||||
void TIM3_OC2PolarityConfig(TIM3_OCPolarity_TypeDef TIM3_OCPolarity);
|
||||
void TIM3_CCxCmd(TIM3_Channel_TypeDef TIM3_Channel, FunctionalState NewState);
|
||||
void TIM3_SelectOCxM(TIM3_Channel_TypeDef TIM3_Channel, TIM3_OCMode_TypeDef TIM3_OCMode);
|
||||
void TIM3_SetCounter(uint16_t Counter);
|
||||
void TIM3_SetAutoreload(uint16_t Autoreload);
|
||||
void TIM3_SetCompare1(uint16_t Compare1);
|
||||
void TIM3_SetCompare2(uint16_t Compare2);
|
||||
void TIM3_SetIC1Prescaler(TIM3_ICPSC_TypeDef TIM3_IC1Prescaler);
|
||||
void TIM3_SetIC2Prescaler(TIM3_ICPSC_TypeDef TIM3_IC2Prescaler);
|
||||
uint16_t TIM3_GetCapture1(void);
|
||||
uint16_t TIM3_GetCapture2(void);
|
||||
uint16_t TIM3_GetCounter(void);
|
||||
TIM3_Prescaler_TypeDef TIM3_GetPrescaler(void);
|
||||
FlagStatus TIM3_GetFlagStatus(TIM3_FLAG_TypeDef TIM3_FLAG);
|
||||
void TIM3_ClearFlag(TIM3_FLAG_TypeDef TIM3_FLAG);
|
||||
ITStatus TIM3_GetITStatus(TIM3_IT_TypeDef TIM3_IT);
|
||||
void TIM3_ClearITPendingBit(TIM3_IT_TypeDef TIM3_IT);
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
#endif /* __STM8S_TIM3_H */
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
|
||||
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
|
||||
169
Serial/inc/stm8s_tim4.h
Normal file
169
Serial/inc/stm8s_tim4.h
Normal file
@@ -0,0 +1,169 @@
|
||||
/**
|
||||
******************************************************************************
|
||||
* @file stm8s_tim4.h
|
||||
* @author MCD Application Team
|
||||
* @version V2.3.0
|
||||
* @date 16-June-2017
|
||||
* @brief This file contains all functions prototype and macros for the TIM4 peripheral.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© COPYRIGHT 2014 STMicroelectronics</center></h2>
|
||||
*
|
||||
* Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
|
||||
* You may not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at:
|
||||
*
|
||||
* http://www.st.com/software_license_agreement_liberty_v2
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an "AS IS" BASIS,
|
||||
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
/* Define to prevent recursive inclusion -------------------------------------*/
|
||||
#ifndef __STM8S_TIM4_H
|
||||
#define __STM8S_TIM4_H
|
||||
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
#include "stm8s.h"
|
||||
|
||||
/** @addtogroup STM8S_StdPeriph_Driver
|
||||
* @{
|
||||
*/
|
||||
|
||||
/* Exported types ------------------------------------------------------------*/
|
||||
|
||||
/** @addtogroup TIM4_Exported_Types
|
||||
* @{
|
||||
*/
|
||||
|
||||
|
||||
|
||||
/** TIM4 Prescaler */
|
||||
typedef enum
|
||||
{
|
||||
TIM4_PRESCALER_1 = ((uint8_t)0x00),
|
||||
TIM4_PRESCALER_2 = ((uint8_t)0x01),
|
||||
TIM4_PRESCALER_4 = ((uint8_t)0x02),
|
||||
TIM4_PRESCALER_8 = ((uint8_t)0x03),
|
||||
TIM4_PRESCALER_16 = ((uint8_t)0x04),
|
||||
TIM4_PRESCALER_32 = ((uint8_t)0x05),
|
||||
TIM4_PRESCALER_64 = ((uint8_t)0x06),
|
||||
TIM4_PRESCALER_128 = ((uint8_t)0x07)
|
||||
} TIM4_Prescaler_TypeDef;
|
||||
|
||||
#define IS_TIM4_PRESCALER_OK(PRESCALER) (((PRESCALER) == TIM4_PRESCALER_1 ) || \
|
||||
((PRESCALER) == TIM4_PRESCALER_2 ) || \
|
||||
((PRESCALER) == TIM4_PRESCALER_4 ) || \
|
||||
((PRESCALER) == TIM4_PRESCALER_8 ) || \
|
||||
((PRESCALER) == TIM4_PRESCALER_16 ) || \
|
||||
((PRESCALER) == TIM4_PRESCALER_32 ) || \
|
||||
((PRESCALER) == TIM4_PRESCALER_64 ) || \
|
||||
((PRESCALER) == TIM4_PRESCALER_128 ) )
|
||||
|
||||
/** TIM4 One Pulse Mode */
|
||||
typedef enum
|
||||
{
|
||||
TIM4_OPMODE_SINGLE = ((uint8_t)0x01),
|
||||
TIM4_OPMODE_REPETITIVE = ((uint8_t)0x00)
|
||||
} TIM4_OPMode_TypeDef;
|
||||
|
||||
#define IS_TIM4_OPM_MODE_OK(MODE) (((MODE) == TIM4_OPMODE_SINGLE) || \
|
||||
((MODE) == TIM4_OPMODE_REPETITIVE))
|
||||
|
||||
/** TIM4 Prescaler Reload Mode */
|
||||
typedef enum
|
||||
{
|
||||
TIM4_PSCRELOADMODE_UPDATE = ((uint8_t)0x00),
|
||||
TIM4_PSCRELOADMODE_IMMEDIATE = ((uint8_t)0x01)
|
||||
} TIM4_PSCReloadMode_TypeDef;
|
||||
|
||||
#define IS_TIM4_PRESCALER_RELOAD_OK(RELOAD) (((RELOAD) == TIM4_PSCRELOADMODE_UPDATE) || \
|
||||
((RELOAD) == TIM4_PSCRELOADMODE_IMMEDIATE))
|
||||
|
||||
/** TIM4 Update Source */
|
||||
typedef enum
|
||||
{
|
||||
TIM4_UPDATESOURCE_GLOBAL = ((uint8_t)0x00),
|
||||
TIM4_UPDATESOURCE_REGULAR = ((uint8_t)0x01)
|
||||
} TIM4_UpdateSource_TypeDef;
|
||||
|
||||
#define IS_TIM4_UPDATE_SOURCE_OK(SOURCE) (((SOURCE) == TIM4_UPDATESOURCE_GLOBAL) || \
|
||||
((SOURCE) == TIM4_UPDATESOURCE_REGULAR))
|
||||
|
||||
/** TIM4 Event Source */
|
||||
typedef enum
|
||||
{
|
||||
TIM4_EVENTSOURCE_UPDATE = ((uint8_t)0x01)
|
||||
}TIM4_EventSource_TypeDef;
|
||||
|
||||
#define IS_TIM4_EVENT_SOURCE_OK(SOURCE) (((SOURCE) == 0x01))
|
||||
|
||||
/** TIM4 Flags */
|
||||
typedef enum
|
||||
{
|
||||
TIM4_FLAG_UPDATE = ((uint8_t)0x01)
|
||||
}TIM4_FLAG_TypeDef;
|
||||
|
||||
#define IS_TIM4_GET_FLAG_OK(FLAG) ((FLAG) == TIM4_FLAG_UPDATE)
|
||||
|
||||
|
||||
|
||||
/** TIM4 interrupt sources */
|
||||
typedef enum
|
||||
{
|
||||
TIM4_IT_UPDATE = ((uint8_t)0x01)
|
||||
}TIM4_IT_TypeDef;
|
||||
|
||||
#define IS_TIM4_IT_OK(IT) ((IT) == TIM4_IT_UPDATE)
|
||||
|
||||
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/* Exported macro ------------------------------------------------------------*/
|
||||
|
||||
/* Exported functions --------------------------------------------------------*/
|
||||
|
||||
/** @addtogroup TIM4_Exported_Functions
|
||||
* @{
|
||||
*/
|
||||
void TIM4_DeInit(void);
|
||||
void TIM4_TimeBaseInit(TIM4_Prescaler_TypeDef TIM4_Prescaler, uint8_t TIM4_Period);
|
||||
void TIM4_Cmd(FunctionalState NewState);
|
||||
void TIM4_ITConfig(TIM4_IT_TypeDef TIM4_IT, FunctionalState NewState);
|
||||
void TIM4_UpdateDisableConfig(FunctionalState NewState);
|
||||
void TIM4_UpdateRequestConfig(TIM4_UpdateSource_TypeDef TIM4_UpdateSource);
|
||||
void TIM4_SelectOnePulseMode(TIM4_OPMode_TypeDef TIM4_OPMode);
|
||||
void TIM4_PrescalerConfig(TIM4_Prescaler_TypeDef Prescaler, TIM4_PSCReloadMode_TypeDef TIM4_PSCReloadMode);
|
||||
void TIM4_ARRPreloadConfig(FunctionalState NewState);
|
||||
void TIM4_GenerateEvent(TIM4_EventSource_TypeDef TIM4_EventSource);
|
||||
void TIM4_SetCounter(uint8_t Counter);
|
||||
void TIM4_SetAutoreload(uint8_t Autoreload);
|
||||
uint8_t TIM4_GetCounter(void);
|
||||
TIM4_Prescaler_TypeDef TIM4_GetPrescaler(void);
|
||||
FlagStatus TIM4_GetFlagStatus(TIM4_FLAG_TypeDef TIM4_FLAG);
|
||||
void TIM4_ClearFlag(TIM4_FLAG_TypeDef TIM4_FLAG);
|
||||
ITStatus TIM4_GetITStatus(TIM4_IT_TypeDef TIM4_IT);
|
||||
void TIM4_ClearITPendingBit(TIM4_IT_TypeDef TIM4_IT);
|
||||
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
#endif /* __STM8S_TIM4_H */
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
|
||||
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
|
||||
473
Serial/inc/stm8s_tim5.h
Normal file
473
Serial/inc/stm8s_tim5.h
Normal file
@@ -0,0 +1,473 @@
|
||||
/**
|
||||
******************************************************************************
|
||||
* @file stm8s_tim5.h
|
||||
* @author MCD Application Team
|
||||
* @version V2.3.0
|
||||
* @date 16-June-2017
|
||||
* @brief This file contains all functions prototype and macros for the TIM5 peripheral.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© COPYRIGHT 2014 STMicroelectronics</center></h2>
|
||||
*
|
||||
* Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
|
||||
* You may not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at:
|
||||
*
|
||||
* http://www.st.com/software_license_agreement_liberty_v2
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an "AS IS" BASIS,
|
||||
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
/* Define to prevent recursive inclusion -------------------------------------*/
|
||||
#ifndef __STM8S_TIM5_H
|
||||
#define __STM8S_TIM5_H
|
||||
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
#include "stm8s.h"
|
||||
|
||||
/** @addtogroup STM8S_StdPeriph_Driver
|
||||
* @{
|
||||
*/
|
||||
|
||||
/* Exported types ------------------------------------------------------------*/
|
||||
|
||||
|
||||
/** TIM5 Forced Action */
|
||||
typedef enum
|
||||
{
|
||||
TIM5_FORCEDACTION_ACTIVE =((uint8_t)0x50),
|
||||
TIM5_FORCEDACTION_INACTIVE =((uint8_t)0x40)
|
||||
}TIM5_ForcedAction_TypeDef;
|
||||
|
||||
#define IS_TIM5_FORCED_ACTION_OK(ACTION) (((ACTION) == TIM5_FORCEDACTION_ACTIVE) || \
|
||||
((ACTION) == TIM5_FORCEDACTION_INACTIVE))
|
||||
|
||||
/** TIM5 Prescaler */
|
||||
typedef enum
|
||||
{
|
||||
TIM5_PRESCALER_1 =((uint8_t)0x00),
|
||||
TIM5_PRESCALER_2 =((uint8_t)0x01),
|
||||
TIM5_PRESCALER_4 =((uint8_t)0x02),
|
||||
TIM5_PRESCALER_8 =((uint8_t)0x03),
|
||||
TIM5_PRESCALER_16 =((uint8_t)0x04),
|
||||
TIM5_PRESCALER_32 =((uint8_t)0x05),
|
||||
TIM5_PRESCALER_64 =((uint8_t)0x06),
|
||||
TIM5_PRESCALER_128 =((uint8_t)0x07),
|
||||
TIM5_PRESCALER_256 =((uint8_t)0x08),
|
||||
TIM5_PRESCALER_512 =((uint8_t)0x09),
|
||||
TIM5_PRESCALER_1024 =((uint8_t)0x0A),
|
||||
TIM5_PRESCALER_2048 =((uint8_t)0x0B),
|
||||
TIM5_PRESCALER_4096 =((uint8_t)0x0C),
|
||||
TIM5_PRESCALER_8192 =((uint8_t)0x0D),
|
||||
TIM5_PRESCALER_16384 =((uint8_t)0x0E),
|
||||
TIM5_PRESCALER_32768 =((uint8_t)0x0F)
|
||||
}TIM5_Prescaler_TypeDef;
|
||||
|
||||
#define IS_TIM5_PRESCALER_OK(PRESCALER) (((PRESCALER) == TIM5_PRESCALER_1) || \
|
||||
((PRESCALER) == TIM5_PRESCALER_2 ) || \
|
||||
((PRESCALER) == TIM5_PRESCALER_4 ) || \
|
||||
((PRESCALER) == TIM5_PRESCALER_8 ) || \
|
||||
((PRESCALER) == TIM5_PRESCALER_16 ) || \
|
||||
((PRESCALER) == TIM5_PRESCALER_32 ) || \
|
||||
((PRESCALER) == TIM5_PRESCALER_64 ) || \
|
||||
((PRESCALER) == TIM5_PRESCALER_128 ) || \
|
||||
((PRESCALER) == TIM5_PRESCALER_256 ) || \
|
||||
((PRESCALER) == TIM5_PRESCALER_512 ) || \
|
||||
((PRESCALER) == TIM5_PRESCALER_1024 ) || \
|
||||
((PRESCALER) == TIM5_PRESCALER_2048 ) || \
|
||||
((PRESCALER) == TIM5_PRESCALER_4096 ) || \
|
||||
((PRESCALER) == TIM5_PRESCALER_8192 ) || \
|
||||
((PRESCALER) == TIM5_PRESCALER_16384 ) || \
|
||||
((PRESCALER) == TIM5_PRESCALER_32768 ))
|
||||
|
||||
/** TIM5 Output Compare and PWM modes */
|
||||
typedef enum
|
||||
{
|
||||
TIM5_OCMODE_TIMING =((uint8_t)0x00),
|
||||
TIM5_OCMODE_ACTIVE =((uint8_t)0x10),
|
||||
TIM5_OCMODE_INACTIVE =((uint8_t)0x20),
|
||||
TIM5_OCMODE_TOGGLE =((uint8_t)0x30),
|
||||
TIM5_OCMODE_PWM1 =((uint8_t)0x60),
|
||||
TIM5_OCMODE_PWM2 =((uint8_t)0x70)
|
||||
}TIM5_OCMode_TypeDef;
|
||||
|
||||
#define IS_TIM5_OC_MODE_OK(MODE) (((MODE) == TIM5_OCMODE_TIMING) || \
|
||||
((MODE) == TIM5_OCMODE_ACTIVE) || \
|
||||
((MODE) == TIM5_OCMODE_INACTIVE) || \
|
||||
((MODE) == TIM5_OCMODE_TOGGLE)|| \
|
||||
((MODE) == TIM5_OCMODE_PWM1) || \
|
||||
((MODE) == TIM5_OCMODE_PWM2))
|
||||
|
||||
#define IS_TIM5_OCM_OK(MODE)(((MODE) == TIM5_OCMODE_TIMING) || \
|
||||
((MODE) == TIM5_OCMODE_ACTIVE) || \
|
||||
((MODE) == TIM5_OCMODE_INACTIVE) || \
|
||||
((MODE) == TIM5_OCMODE_TOGGLE)|| \
|
||||
((MODE) == TIM5_OCMODE_PWM1) || \
|
||||
((MODE) == TIM5_OCMODE_PWM2) || \
|
||||
((MODE) == (uint8_t)TIM5_FORCEDACTION_ACTIVE) || \
|
||||
((MODE) == (uint8_t)TIM5_FORCEDACTION_INACTIVE))
|
||||
|
||||
/** TIM5 One Pulse Mode */
|
||||
typedef enum
|
||||
{
|
||||
TIM5_OPMODE_SINGLE =((uint8_t)0x01),
|
||||
TIM5_OPMODE_REPETITIVE =((uint8_t)0x00)
|
||||
}TIM5_OPMode_TypeDef;
|
||||
|
||||
#define IS_TIM5_OPM_MODE_OK(MODE) (((MODE) == TIM5_OPMODE_SINGLE) || \
|
||||
((MODE) == TIM5_OPMODE_REPETITIVE))
|
||||
|
||||
/** TIM5 Channel */
|
||||
typedef enum
|
||||
{
|
||||
TIM5_CHANNEL_1 =((uint8_t)0x00),
|
||||
TIM5_CHANNEL_2 =((uint8_t)0x01),
|
||||
TIM5_CHANNEL_3 =((uint8_t)0x02)
|
||||
}TIM5_Channel_TypeDef;
|
||||
|
||||
#define IS_TIM5_CHANNEL_OK(CHANNEL) (((CHANNEL) == TIM5_CHANNEL_1) || \
|
||||
((CHANNEL) == TIM5_CHANNEL_2) || \
|
||||
((CHANNEL) == TIM5_CHANNEL_3))
|
||||
|
||||
#define IS_TIM5_PWMI_CHANNEL_OK(CHANNEL) (((CHANNEL) == TIM5_CHANNEL_1) || \
|
||||
((CHANNEL) == TIM5_CHANNEL_2))
|
||||
|
||||
/** TIM5 Output Compare Polarity */
|
||||
typedef enum
|
||||
{
|
||||
TIM5_OCPOLARITY_HIGH =((uint8_t)0x00),
|
||||
TIM5_OCPOLARITY_LOW =((uint8_t)0x22)
|
||||
}TIM5_OCPolarity_TypeDef;
|
||||
|
||||
#define IS_TIM5_OC_POLARITY_OK(POLARITY) (((POLARITY) == TIM5_OCPOLARITY_HIGH) || \
|
||||
((POLARITY) == TIM5_OCPOLARITY_LOW))
|
||||
|
||||
/** TIM5 Output Compare states */
|
||||
typedef enum
|
||||
{
|
||||
TIM5_OUTPUTSTATE_DISABLE =((uint8_t)0x00),
|
||||
TIM5_OUTPUTSTATE_ENABLE =((uint8_t)0x11)
|
||||
}TIM5_OutputState_TypeDef;
|
||||
|
||||
#define IS_TIM5_OUTPUT_STATE_OK(STATE) (((STATE) == TIM5_OUTPUTSTATE_DISABLE) || \
|
||||
((STATE) == TIM5_OUTPUTSTATE_ENABLE))
|
||||
|
||||
/** TIM5 Input Capture Polarity */
|
||||
typedef enum
|
||||
{
|
||||
TIM5_ICPOLARITY_RISING =((uint8_t)0x00),
|
||||
TIM5_ICPOLARITY_FALLING =((uint8_t)0x44)
|
||||
}TIM5_ICPolarity_TypeDef;
|
||||
|
||||
#define IS_TIM5_IC_POLARITY_OK(POLARITY) (((POLARITY) == TIM5_ICPOLARITY_RISING) || \
|
||||
((POLARITY) == TIM5_ICPOLARITY_FALLING))
|
||||
|
||||
/** TIM5 Input Capture Selection */
|
||||
typedef enum
|
||||
{
|
||||
TIM5_ICSELECTION_DIRECTTI =((uint8_t)0x01),
|
||||
TIM5_ICSELECTION_INDIRECTTI =((uint8_t)0x02),
|
||||
TIM5_ICSELECTION_TRGI =((uint8_t)0x03)
|
||||
}TIM5_ICSelection_TypeDef;
|
||||
|
||||
#define IS_TIM5_IC_SELECTION_OK(SELECTION) (((SELECTION) == TIM5_ICSELECTION_DIRECTTI) || \
|
||||
((SELECTION) == TIM5_ICSELECTION_INDIRECTTI) || \
|
||||
((SELECTION) == TIM5_ICSELECTION_TRGI))
|
||||
|
||||
#define IS_TIM5_IC_SELECTION1_OK(SELECTION) (((SELECTION) == TIM5_ICSELECTION_DIRECTTI) || \
|
||||
((SELECTION) == TIM5_ICSELECTION_TRGI))
|
||||
|
||||
/** TIM5 Input Capture Prescaler */
|
||||
typedef enum
|
||||
{
|
||||
TIM5_ICPSC_DIV1 =((uint8_t)0x00),
|
||||
TIM5_ICPSC_DIV2 =((uint8_t)0x04),
|
||||
TIM5_ICPSC_DIV4 =((uint8_t)0x08),
|
||||
TIM5_ICPSC_DIV8 =((uint8_t)0x0C)
|
||||
}TIM5_ICPSC_TypeDef;
|
||||
|
||||
#define IS_TIM5_IC_PRESCALER_OK(PRESCALER) (((PRESCALER) == TIM5_ICPSC_DIV1) || \
|
||||
((PRESCALER) == TIM5_ICPSC_DIV2) || \
|
||||
((PRESCALER) == TIM5_ICPSC_DIV4) || \
|
||||
((PRESCALER) == TIM5_ICPSC_DIV8))
|
||||
|
||||
/** TIM5 Input Capture Filer Value */
|
||||
#define IS_TIM5_IC_FILTER_OK(ICFILTER) ((ICFILTER) <= 0x0F)
|
||||
|
||||
/** TIM5 interrupt sources */
|
||||
typedef enum
|
||||
{
|
||||
TIM5_IT_UPDATE =((uint8_t)0x01),
|
||||
TIM5_IT_CC1 =((uint8_t)0x02),
|
||||
TIM5_IT_CC2 =((uint8_t)0x04),
|
||||
TIM5_IT_CC3 =((uint8_t)0x08),
|
||||
TIM5_IT_TRIGGER = ((uint8_t)0x40)
|
||||
}TIM5_IT_TypeDef;
|
||||
|
||||
#define IS_TIM5_IT_OK(IT) (((IT) != 0x00) && ((IT) <= 0x4F))
|
||||
|
||||
#define IS_TIM5_GET_IT_OK(IT) (((IT) == TIM5_IT_UPDATE) || \
|
||||
((IT) == TIM5_IT_CC1) || \
|
||||
((IT) == TIM5_IT_CC2) || \
|
||||
((IT) == TIM5_IT_CC3) || \
|
||||
((IT) == TIM5_IT_TRIGGER))
|
||||
|
||||
/** TIM5 Prescaler Reload Mode */
|
||||
typedef enum
|
||||
{
|
||||
TIM5_PSCRELOADMODE_UPDATE =((uint8_t)0x00),
|
||||
TIM5_PSCRELOADMODE_IMMEDIATE =((uint8_t)0x01)
|
||||
}TIM5_PSCReloadMode_TypeDef;
|
||||
|
||||
#define IS_TIM5_PRESCALER_RELOAD_OK(RELOAD) (((RELOAD) == TIM5_PSCRELOADMODE_UPDATE) || \
|
||||
((RELOAD) == TIM5_PSCRELOADMODE_IMMEDIATE))
|
||||
|
||||
/** TIM5 Event Source */
|
||||
typedef enum
|
||||
{
|
||||
TIM5_EVENTSOURCE_UPDATE =((uint8_t)0x01),
|
||||
TIM5_EVENTSOURCE_CC1 =((uint8_t)0x02),
|
||||
TIM5_EVENTSOURCE_CC2 =((uint8_t)0x04),
|
||||
TIM5_EVENTSOURCE_CC3 =((uint8_t)0x08),
|
||||
TIM5_EVENTSOURCE_TRIGGER = ((uint8_t)0x40)
|
||||
}TIM5_EventSource_TypeDef;
|
||||
|
||||
#define IS_TIM5_EVENT_SOURCE_OK(SOURCE) (((SOURCE) != 0x00))
|
||||
|
||||
/** TIM5 Update Source */
|
||||
typedef enum
|
||||
{
|
||||
TIM5_UPDATESOURCE_GLOBAL =((uint8_t)0x00),
|
||||
TIM5_UPDATESOURCE_REGULAR =((uint8_t)0x01)
|
||||
}TIM5_UpdateSource_TypeDef;
|
||||
|
||||
|
||||
#define IS_TIM5_UPDATE_SOURCE_OK(SOURCE) (((SOURCE) == TIM5_UPDATESOURCE_GLOBAL) || \
|
||||
((SOURCE) == TIM5_UPDATESOURCE_REGULAR))
|
||||
|
||||
/**
|
||||
* @brief TIM5 Trigger Output Source
|
||||
*/
|
||||
typedef enum
|
||||
{
|
||||
TIM5_TRGOSOURCE_RESET = ((uint8_t)0x00), /*!< Trigger Output source = Reset*/
|
||||
TIM5_TRGOSOURCE_ENABLE = ((uint8_t)0x10), /*!< Trigger Output source = TIM5 is enabled*/
|
||||
TIM5_TRGOSOURCE_UPDATE = ((uint8_t)0x20), /*!< Trigger Output source = Update event*/
|
||||
TIM5_TRGOSOURCE_OC1 = ((uint8_t)0x30), /*!< Trigger Output source = output compare channel1 */
|
||||
TIM5_TRGOSOURCE_OC1REF = ((uint8_t)0x40), /*!< Trigger Output source = output compare channel 1 reference */
|
||||
TIM5_TRGOSOURCE_OC2REF = ((uint8_t)0x50) /*!< Trigger Output source = output compare channel 2 reference */
|
||||
}TIM5_TRGOSource_TypeDef;
|
||||
|
||||
/**
|
||||
* @brief Macro TIM5 TRGO source
|
||||
*/
|
||||
#define IS_TIM5_TRGO_SOURCE_OK(SOURCE) \
|
||||
(((SOURCE) == TIM5_TRGOSOURCE_RESET) || \
|
||||
((SOURCE) == TIM5_TRGOSOURCE_ENABLE) || \
|
||||
((SOURCE) == TIM5_TRGOSOURCE_UPDATE) || \
|
||||
((SOURCE) == TIM5_TRGOSOURCE_OC1) || \
|
||||
((SOURCE) == TIM5_TRGOSOURCE_OC1REF) || \
|
||||
((SOURCE) == TIM5_TRGOSOURCE_OC2REF))
|
||||
|
||||
/** TIM5 Flags */
|
||||
typedef enum
|
||||
{
|
||||
TIM5_FLAG_UPDATE =((uint16_t)0x0001),
|
||||
TIM5_FLAG_CC1 =((uint16_t)0x0002),
|
||||
TIM5_FLAG_CC2 =((uint16_t)0x0004),
|
||||
TIM5_FLAG_CC3 =((uint16_t)0x0008),
|
||||
TIM5_FLAG_TRIGGER = ((uint16_t)0x0040),
|
||||
TIM5_FLAG_CC1OF =((uint16_t)0x0200),
|
||||
TIM5_FLAG_CC2OF =((uint16_t)0x0400),
|
||||
TIM5_FLAG_CC3OF =((uint16_t)0x0800)
|
||||
}TIM5_FLAG_TypeDef;
|
||||
|
||||
#define IS_TIM5_GET_FLAG_OK(FLAG) (((FLAG) == TIM5_FLAG_UPDATE) || \
|
||||
((FLAG) == TIM5_FLAG_CC1) || \
|
||||
((FLAG) == TIM5_FLAG_CC2) || \
|
||||
((FLAG) == TIM5_FLAG_CC3) || \
|
||||
((FLAG) == TIM5_FLAG_TRIGGER) || \
|
||||
((FLAG) == TIM5_FLAG_CC1OF) || \
|
||||
((FLAG) == TIM5_FLAG_CC2OF) || \
|
||||
((FLAG) == TIM5_FLAG_CC3OF))
|
||||
|
||||
#define IS_TIM5_CLEAR_FLAG_OK(FLAG) ((((uint16_t)(FLAG) & 0xF1F0) == 0x0000) && ((uint16_t)(FLAG) != 0x0000))
|
||||
|
||||
|
||||
/**
|
||||
* @brief TIM5 Slave Mode
|
||||
*/
|
||||
typedef enum
|
||||
{
|
||||
TIM5_SLAVEMODE_RESET = ((uint8_t)0x04), /*!< Slave Mode Selection = Reset*/
|
||||
TIM5_SLAVEMODE_GATED = ((uint8_t)0x05), /*!< Slave Mode Selection = Gated*/
|
||||
TIM5_SLAVEMODE_TRIGGER = ((uint8_t)0x06), /*!< Slave Mode Selection = Trigger*/
|
||||
TIM5_SLAVEMODE_EXTERNAL1 = ((uint8_t)0x07) /*!< Slave Mode Selection = External 1*/
|
||||
}TIM5_SlaveMode_TypeDef;
|
||||
|
||||
/**
|
||||
* @brief Macro TIM5 Slave mode
|
||||
*/
|
||||
#define IS_TIM5_SLAVE_MODE_OK(MODE) \
|
||||
(((MODE) == TIM5_SLAVEMODE_RESET) || \
|
||||
((MODE) == TIM5_SLAVEMODE_GATED) || \
|
||||
((MODE) == TIM5_SLAVEMODE_TRIGGER) || \
|
||||
((MODE) == TIM5_SLAVEMODE_EXTERNAL1))
|
||||
|
||||
/**
|
||||
* @brief TIM5 Internal Trigger Selection
|
||||
*/
|
||||
typedef enum
|
||||
{
|
||||
TIM5_TS_TIM6 = ((uint8_t)0x00), /*!< TRIG Input source = TIM6 TRIG Output */
|
||||
TIM5_TS_TIM1 = ((uint8_t)0x03) /*!< TRIG Input source = TIM1 TRIG Output */
|
||||
}TIM5_TS_TypeDef;
|
||||
|
||||
/**
|
||||
* @brief Macro TIM5 Trigger Selection
|
||||
*/
|
||||
#define IS_TIM5_TRIGGER_SELECTION_OK(SELECTION) \
|
||||
(((SELECTION) == TIM5_TS_TIM6) || \
|
||||
((SELECTION) == TIM5_TS_TIM1) )
|
||||
|
||||
|
||||
#define IS_TIM5_TIX_TRIGGER_SELECTION_OK(SELECTION) \
|
||||
(((SELECTION) == TIM5_TS_TI1F_ED) || \
|
||||
((SELECTION) == TIM5_TS_TI1FP1) || \
|
||||
((SELECTION) == TIM5_TS_TI2FP2))
|
||||
|
||||
|
||||
/**
|
||||
* @brief TIM5 Encoder Mode
|
||||
*/
|
||||
typedef enum
|
||||
{
|
||||
TIM5_ENCODERMODE_TI1 = ((uint8_t)0x01), /*!< Encoder mode 1*/
|
||||
TIM5_ENCODERMODE_TI2 = ((uint8_t)0x02), /*!< Encoder mode 2*/
|
||||
TIM5_ENCODERMODE_TI12 = ((uint8_t)0x03) /*!< Encoder mode 3*/
|
||||
}TIM5_EncoderMode_TypeDef;
|
||||
/**
|
||||
* @brief Macro TIM5 encoder mode
|
||||
*/
|
||||
#define IS_TIM5_ENCODER_MODE_OK(MODE) \
|
||||
(((MODE) == TIM5_ENCODERMODE_TI1) || \
|
||||
((MODE) == TIM5_ENCODERMODE_TI2) || \
|
||||
((MODE) == TIM5_ENCODERMODE_TI12))
|
||||
|
||||
/**
|
||||
* @brief TIM5 External Trigger Prescaler
|
||||
*/
|
||||
typedef enum
|
||||
{
|
||||
TIM5_EXTTRGPSC_OFF = ((uint8_t)0x00), /*!< No External Trigger prescaler */
|
||||
TIM5_EXTTRGPSC_DIV2 = ((uint8_t)0x10), /*!< External Trigger prescaler = 2 (ETRP frequency divided by 2) */
|
||||
TIM5_EXTTRGPSC_DIV4 = ((uint8_t)0x20), /*!< External Trigger prescaler = 4 (ETRP frequency divided by 4) */
|
||||
TIM5_EXTTRGPSC_DIV8 = ((uint8_t)0x30) /*!< External Trigger prescaler = 8 (ETRP frequency divided by 8) */
|
||||
}TIM5_ExtTRGPSC_TypeDef;
|
||||
|
||||
/**
|
||||
* @brief Macro TIM5 external trigger prescaler
|
||||
*/
|
||||
#define IS_TIM5_EXT_PRESCALER_OK(PRESCALER) \
|
||||
(((PRESCALER) == TIM5_EXTTRGPSC_OFF) || \
|
||||
((PRESCALER) == TIM5_EXTTRGPSC_DIV2) || \
|
||||
((PRESCALER) == TIM5_EXTTRGPSC_DIV4) || \
|
||||
((PRESCALER) == TIM5_EXTTRGPSC_DIV8))
|
||||
|
||||
/**
|
||||
* @brief TIM5 External Trigger Polarity
|
||||
*/
|
||||
typedef enum
|
||||
{
|
||||
TIM5_EXTTRGPOLARITY_INVERTED = ((uint8_t)0x80), /*!< External Trigger Polarity = inverted */
|
||||
TIM5_EXTTRGPOLARITY_NONINVERTED = ((uint8_t)0x00) /*!< External Trigger Polarity = non inverted */
|
||||
}TIM5_ExtTRGPolarity_TypeDef;
|
||||
|
||||
/**
|
||||
* @brief Macro TIM5 Trigger Polarity
|
||||
*/
|
||||
#define IS_TIM5_EXT_POLARITY_OK(POLARITY) \
|
||||
(((POLARITY) == TIM5_EXTTRGPOLARITY_INVERTED) || \
|
||||
((POLARITY) == TIM5_EXTTRGPOLARITY_NONINVERTED))
|
||||
|
||||
/**
|
||||
* @brief Macro TIM5 External Trigger Filter
|
||||
*/
|
||||
#define IS_TIM5_EXT_FILTER_OK(EXTFILTER) ((EXTFILTER) <= 0x0F)
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/* Exported macro ------------------------------------------------------------*/
|
||||
|
||||
/* Exported functions --------------------------------------------------------*/
|
||||
|
||||
/** @addtogroup TIM5_Exported_Functions
|
||||
* @{
|
||||
*/
|
||||
|
||||
void TIM5_DeInit(void);
|
||||
void TIM5_TimeBaseInit(TIM5_Prescaler_TypeDef TIM5_Prescaler, uint16_t TIM5_Period);
|
||||
void TIM5_OC1Init(TIM5_OCMode_TypeDef TIM5_OCMode, TIM5_OutputState_TypeDef TIM5_OutputState,uint16_t TIM5_Pulse, TIM5_OCPolarity_TypeDef TIM5_OCPolarity);
|
||||
void TIM5_OC2Init(TIM5_OCMode_TypeDef TIM5_OCMode, TIM5_OutputState_TypeDef TIM5_OutputState,uint16_t TIM5_Pulse, TIM5_OCPolarity_TypeDef TIM5_OCPolarity);
|
||||
void TIM5_OC3Init(TIM5_OCMode_TypeDef TIM5_OCMode, TIM5_OutputState_TypeDef TIM5_OutputState,uint16_t TIM5_Pulse, TIM5_OCPolarity_TypeDef TIM5_OCPolarity);
|
||||
void TIM5_ICInit(TIM5_Channel_TypeDef TIM5_Channel, TIM5_ICPolarity_TypeDef TIM5_ICPolarity, TIM5_ICSelection_TypeDef TIM5_ICSelection, TIM5_ICPSC_TypeDef TIM5_ICPrescaler, uint8_t TIM5_ICFilter);
|
||||
void TIM5_PWMIConfig(TIM5_Channel_TypeDef TIM5_Channel, TIM5_ICPolarity_TypeDef TIM5_ICPolarity, TIM5_ICSelection_TypeDef TIM5_ICSelection, TIM5_ICPSC_TypeDef TIM5_ICPrescaler, uint8_t TIM5_ICFilter);
|
||||
void TIM5_Cmd(FunctionalState NewState);
|
||||
void TIM5_ITConfig(TIM5_IT_TypeDef TIM5_IT, FunctionalState NewState);
|
||||
void TIM5_InternalClockConfig(void);
|
||||
void TIM5_UpdateDisableConfig(FunctionalState NewState);
|
||||
void TIM5_UpdateRequestConfig(TIM5_UpdateSource_TypeDef TIM5_UpdateSource);
|
||||
void TIM5_SelectOnePulseMode(TIM5_OPMode_TypeDef TIM5_OPMode);
|
||||
void TIM5_PrescalerConfig(TIM5_Prescaler_TypeDef Prescaler, TIM5_PSCReloadMode_TypeDef TIM5_PSCReloadMode);
|
||||
void TIM5_SelectOutputTrigger(TIM5_TRGOSource_TypeDef TIM5_TRGOSource);
|
||||
void TIM5_ForcedOC1Config(TIM5_ForcedAction_TypeDef TIM5_ForcedAction);
|
||||
void TIM5_ForcedOC2Config(TIM5_ForcedAction_TypeDef TIM5_ForcedAction);
|
||||
void TIM5_ForcedOC3Config(TIM5_ForcedAction_TypeDef TIM5_ForcedAction);
|
||||
void TIM5_ARRPreloadConfig(FunctionalState NewState);
|
||||
void TIM5_CCPreloadControl(FunctionalState NewState);
|
||||
void TIM5_OC1PreloadConfig(FunctionalState NewState);
|
||||
void TIM5_OC2PreloadConfig(FunctionalState NewState);
|
||||
void TIM5_OC3PreloadConfig(FunctionalState NewState);
|
||||
void TIM5_GenerateEvent(TIM5_EventSource_TypeDef TIM5_EventSource);
|
||||
void TIM5_OC1PolarityConfig(TIM5_OCPolarity_TypeDef TIM5_OCPolarity);
|
||||
void TIM5_OC2PolarityConfig(TIM5_OCPolarity_TypeDef TIM5_OCPolarity);
|
||||
void TIM5_OC3PolarityConfig(TIM5_OCPolarity_TypeDef TIM5_OCPolarity);
|
||||
void TIM5_CCxCmd(TIM5_Channel_TypeDef TIM5_Channel, FunctionalState NewState);
|
||||
void TIM5_SelectOCxM(TIM5_Channel_TypeDef TIM5_Channel, TIM5_OCMode_TypeDef TIM5_OCMode);
|
||||
void TIM5_SetCounter(uint16_t Counter);
|
||||
void TIM5_SetAutoreload(uint16_t Autoreload);
|
||||
void TIM5_SetCompare1(uint16_t Compare1);
|
||||
void TIM5_SetCompare2(uint16_t Compare2);
|
||||
void TIM5_SetCompare3(uint16_t Compare3);
|
||||
void TIM5_SetIC1Prescaler(TIM5_ICPSC_TypeDef TIM5_IC1Prescaler);
|
||||
void TIM5_SetIC2Prescaler(TIM5_ICPSC_TypeDef TIM5_IC2Prescaler);
|
||||
void TIM5_SetIC3Prescaler(TIM5_ICPSC_TypeDef TIM5_IC3Prescaler);
|
||||
uint16_t TIM5_GetCapture1(void);
|
||||
uint16_t TIM5_GetCapture2(void);
|
||||
uint16_t TIM5_GetCapture3(void);
|
||||
uint16_t TIM5_GetCounter(void);
|
||||
TIM5_Prescaler_TypeDef TIM5_GetPrescaler(void);
|
||||
FlagStatus TIM5_GetFlagStatus(TIM5_FLAG_TypeDef TIM5_FLAG);
|
||||
void TIM5_ClearFlag(TIM5_FLAG_TypeDef TIM5_FLAG);
|
||||
ITStatus TIM5_GetITStatus(TIM5_IT_TypeDef TIM5_IT);
|
||||
void TIM5_ClearITPendingBit(TIM5_IT_TypeDef TIM5_IT);
|
||||
void TIM5_SelectInputTrigger(TIM5_TS_TypeDef TIM5_InputTriggerSource);
|
||||
void TIM5_SelectSlaveMode(TIM5_SlaveMode_TypeDef TIM5_SlaveMode);
|
||||
void TIM5_EncoderInterfaceConfig(TIM5_EncoderMode_TypeDef TIM5_EncoderMode, TIM5_ICPolarity_TypeDef TIM5_IC1Polarity,TIM5_ICPolarity_TypeDef TIM5_IC2Polarity);
|
||||
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
#endif /* __STM8S_TIM5_H */
|
||||
|
||||
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
|
||||
287
Serial/inc/stm8s_tim6.h
Normal file
287
Serial/inc/stm8s_tim6.h
Normal file
@@ -0,0 +1,287 @@
|
||||
/**
|
||||
******************************************************************************
|
||||
* @file stm8s_tim6.h
|
||||
* @author MCD Application Team
|
||||
* @version V2.3.0
|
||||
* @date 16-June-2017
|
||||
* @brief This file contains all functions prototype and macros for the TIM6 peripheral.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© COPYRIGHT 2014 STMicroelectronics</center></h2>
|
||||
*
|
||||
* Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
|
||||
* You may not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at:
|
||||
*
|
||||
* http://www.st.com/software_license_agreement_liberty_v2
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an "AS IS" BASIS,
|
||||
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
/* Define to prevent recursive inclusion -------------------------------------*/
|
||||
#ifndef __STM8S_TIM6_H
|
||||
#define __STM8S_TIM6_H
|
||||
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
#include "stm8s.h"
|
||||
|
||||
/** @addtogroup STM8S_StdPeriph_Driver
|
||||
* @{
|
||||
*/
|
||||
|
||||
/* Exported variables ------------------------------------------------------- */
|
||||
/* Exported types ------------------------------------------------------------*/
|
||||
|
||||
/** @addtogroup TIM6_Exported_Types
|
||||
* @{
|
||||
*/
|
||||
|
||||
|
||||
/**
|
||||
* @brief TIM6 Prescaler
|
||||
*/
|
||||
typedef enum
|
||||
{
|
||||
TIM6_PRESCALER_1 = ((uint8_t)0x00), /*!< Time base Prescaler = 1 (No effect)*/
|
||||
TIM6_PRESCALER_2 = ((uint8_t)0x01), /*!< Time base Prescaler = 2 */
|
||||
TIM6_PRESCALER_4 = ((uint8_t)0x02), /*!< Time base Prescaler = 4 */
|
||||
TIM6_PRESCALER_8 = ((uint8_t)0x03), /*!< Time base Prescaler = 8 */
|
||||
TIM6_PRESCALER_16 = ((uint8_t)0x04), /*!< Time base Prescaler = 16 */
|
||||
TIM6_PRESCALER_32 = ((uint8_t)0x05), /*!< Time base Prescaler = 32 */
|
||||
TIM6_PRESCALER_64 = ((uint8_t)0x06), /*!< Time base Prescaler = 64 */
|
||||
TIM6_PRESCALER_128 = ((uint8_t)0x07) /*!< Time base Prescaler = 128 */
|
||||
}TIM6_Prescaler_TypeDef;
|
||||
|
||||
/**
|
||||
* @brief TIM6 One Pulse Mode
|
||||
*/
|
||||
typedef enum
|
||||
{
|
||||
TIM6_OPMODE_SINGLE = ((uint8_t)0x01), /*!< Single one Pulse mode (OPM Active) */
|
||||
TIM6_OPMODE_REPETITIVE = ((uint8_t)0x00) /*!< Repetitive Pulse mode (OPM inactive) */
|
||||
}TIM6_OPMode_TypeDef;
|
||||
|
||||
/**
|
||||
* @brief TIM6 Prescaler Reload Mode
|
||||
*/
|
||||
typedef enum
|
||||
{
|
||||
TIM6_PSCRELOADMODE_UPDATE =((uint8_t)0x00), /*!< Prescaler value is reloaded at every update*/
|
||||
TIM6_PSCRELOADMODE_IMMEDIATE =((uint8_t)0x01) /*!< Prescaler value is reloaded immediately*/
|
||||
}TIM6_PSCReloadMode_TypeDef;
|
||||
|
||||
/**
|
||||
* @brief TIM6 Update Source
|
||||
*/
|
||||
typedef enum
|
||||
{
|
||||
TIM6_UPDATESOURCE_GLOBAL =((uint8_t)0x00), /*!< Global Update request source */
|
||||
TIM6_UPDATESOURCE_REGULAR =((uint8_t)0x01) /*!< Regular Update request source */
|
||||
}TIM6_UpdateSource_TypeDef;
|
||||
|
||||
/**
|
||||
* @brief TIM6 Event Source
|
||||
*/
|
||||
typedef enum
|
||||
{
|
||||
TIM6_EVENTSOURCE_UPDATE = ((uint8_t)0x01), /*!< Update Event*/
|
||||
TIM6_EVENTSOURCE_TRIGGER = ((uint8_t)0x40) /*!< Trigger Event*/
|
||||
}TIM6_EventSource_TypeDef;
|
||||
|
||||
/**
|
||||
* @brief TIM6 Trigger Output Source
|
||||
*/
|
||||
typedef enum
|
||||
{
|
||||
TIM6_TRGOSOURCE_RESET = ((uint8_t)0x00), /*!< Trigger Output source = Reset*/
|
||||
TIM6_TRGOSOURCE_ENABLE = ((uint8_t)0x10), /*!< Trigger Output source = TIM5 is enabled*/
|
||||
TIM6_TRGOSOURCE_UPDATE = ((uint8_t)0x20) /*!< Trigger Output source = Update event*/
|
||||
}TIM6_TRGOSource_TypeDef;
|
||||
|
||||
/**
|
||||
* @brief TIM6 Slave Mode
|
||||
*/
|
||||
typedef enum
|
||||
{
|
||||
TIM6_SLAVEMODE_DISABLE = ((uint8_t)0x00), /*!< Disable slave mode to clock the prescaler directly with the internal clock */
|
||||
TIM6_SLAVEMODE_RESET = ((uint8_t)0x04), /*!< Slave Mode Selection = Reset*/
|
||||
TIM6_SLAVEMODE_GATED = ((uint8_t)0x05), /*!< Slave Mode Selection = Gated*/
|
||||
TIM6_SLAVEMODE_TRIGGER = ((uint8_t)0x06), /*!< Slave Mode Selection = Trigger*/
|
||||
TIM6_SLAVEMODE_EXTERNAL1 = ((uint8_t)0x07) /*!< Slave Mode Selection = External 1*/
|
||||
}TIM6_SlaveMode_TypeDef;
|
||||
|
||||
/**
|
||||
* @brief TIM6 Flags
|
||||
*/
|
||||
typedef enum
|
||||
{
|
||||
TIM6_FLAG_UPDATE = ((uint8_t)0x01), /*!< Update Flag */
|
||||
TIM6_FLAG_TRIGGER = ((uint8_t)0x40) /*!< Trigger Flag */
|
||||
}TIM6_FLAG_TypeDef;
|
||||
|
||||
/**
|
||||
* @brief TIM6 interrupt sources
|
||||
*/
|
||||
typedef enum
|
||||
{
|
||||
TIM6_IT_UPDATE = ((uint8_t)0x01), /*!< Update Interrupt*/
|
||||
TIM6_IT_TRIGGER = ((uint8_t)0x40) /*!< Trigger Interrupt*/
|
||||
}TIM6_IT_TypeDef;
|
||||
|
||||
/**
|
||||
* @brief TIM6 Internal Trigger Selection
|
||||
*/
|
||||
typedef enum
|
||||
{
|
||||
TIM6_TS_TIM1 = ((uint8_t)0x20),/*!< TRIG Input source = TIM1 TRIG Output */
|
||||
TIM6_TS_TIM5 = ((uint8_t)0x30) /*!< TRIG Input source = TIM5 TRIG Output */
|
||||
}TIM6_TS_TypeDef;
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/* Exported constants --------------------------------------------------------*/
|
||||
/* Exported macros -----------------------------------------------------------*/
|
||||
/* Private macros ------------------------------------------------------------*/
|
||||
|
||||
/** @addtogroup TIM6_Private_Macros
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @brief Macro used by the assert function to check the different functions parameters.
|
||||
*/
|
||||
|
||||
/**
|
||||
* @brief Macro TIM6 Prescaler
|
||||
*/
|
||||
#define IS_TIM6_PRESCALER_OK(PRESCALER) \
|
||||
(((PRESCALER) == TIM6_PRESCALER_1) || \
|
||||
((PRESCALER) == TIM6_PRESCALER_2) || \
|
||||
((PRESCALER) == TIM6_PRESCALER_4) || \
|
||||
((PRESCALER) == TIM6_PRESCALER_8) || \
|
||||
((PRESCALER) == TIM6_PRESCALER_16) || \
|
||||
((PRESCALER) == TIM6_PRESCALER_32) || \
|
||||
((PRESCALER) == TIM6_PRESCALER_64) || \
|
||||
((PRESCALER) == TIM6_PRESCALER_128))
|
||||
/**
|
||||
* @brief Macro TIM6 One Pulse Mode
|
||||
*/
|
||||
#define IS_TIM6_OPM_MODE_OK(MODE) \
|
||||
(((MODE) == TIM6_OPMODE_SINGLE) || \
|
||||
((MODE) == TIM6_OPMODE_REPETITIVE))
|
||||
|
||||
/**
|
||||
* @brief Macro TIM6 Prescaler reload
|
||||
*/
|
||||
#define IS_TIM6_PRESCALER_RELOAD_OK(RELOAD) \
|
||||
(((RELOAD) == TIM6_PSCRELOADMODE_UPDATE) || \
|
||||
((RELOAD) == TIM6_PSCRELOADMODE_IMMEDIATE))
|
||||
/**
|
||||
* @brief Macro TIM6 Update source
|
||||
*/
|
||||
#define IS_TIM6_UPDATE_SOURCE_OK(SOURCE) \
|
||||
(((SOURCE) == TIM6_UPDATESOURCE_GLOBAL) || \
|
||||
((SOURCE) == TIM6_UPDATESOURCE_REGULAR))
|
||||
/**
|
||||
* @brief Macro TIM6 Event source
|
||||
*/
|
||||
#define IS_TIM6_EVENT_SOURCE_OK(SOURCE) \
|
||||
((((SOURCE) & (uint8_t)0xBE) == 0x00) && \
|
||||
((SOURCE) != 0x00))
|
||||
|
||||
/**
|
||||
* @brief Macro TIM6 TRGO source
|
||||
*/
|
||||
#define IS_TIM6_TRGO_SOURCE_OK(SOURCE) \
|
||||
(((SOURCE) == TIM6_TRGOSOURCE_RESET) || \
|
||||
((SOURCE) == TIM6_TRGOSOURCE_ENABLE)|| \
|
||||
((SOURCE) == TIM6_TRGOSOURCE_UPDATE))
|
||||
/**
|
||||
* @brief Macro TIM6 Slave mode
|
||||
*/
|
||||
#define IS_TIM6_SLAVE_MODE_OK(MODE) \
|
||||
(((MODE) == TIM6_SLAVEMODE_DISABLE) || \
|
||||
((MODE) == TIM6_SLAVEMODE_RESET) || \
|
||||
((MODE) == TIM6_SLAVEMODE_GATED) || \
|
||||
((MODE) == TIM6_SLAVEMODE_TRIGGER) || \
|
||||
((MODE) == TIM6_SLAVEMODE_EXTERNAL1))
|
||||
/**
|
||||
* @brief Macro TIM6 Flags
|
||||
*/
|
||||
#define IS_TIM6_GET_FLAG_OK(FLAG) \
|
||||
(((FLAG) == TIM6_FLAG_UPDATE) || \
|
||||
((FLAG) == TIM6_FLAG_TRIGGER))
|
||||
|
||||
#define IS_TIM6_CLEAR_FLAG_OK(FLAG) \
|
||||
((((FLAG) & (uint8_t)0xBE) == 0x00) && ((FLAG) != 0x00))
|
||||
/**
|
||||
* @brief Macro TIM6 interrupts
|
||||
*/
|
||||
#define IS_TIM6_IT_OK(IT) \
|
||||
(((IT) != 0x00) && \
|
||||
(((IT) & (uint8_t)(~(uint8_t)(0x41)))== 0x00))
|
||||
|
||||
#define IS_TIM6_GET_IT_OK(IT) \
|
||||
(((IT) == TIM6_IT_UPDATE) || \
|
||||
((IT) == TIM6_IT_TRIGGER))
|
||||
/**
|
||||
* @brief Macro TIM6 Trigger selection
|
||||
*/
|
||||
#define IS_TIM6_TRIGGER_SELECTION_OK(SELECTION) \
|
||||
(((SELECTION) == TIM6_TS_TIM5) || \
|
||||
((SELECTION) == TIM6_TS_TIM1))
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/* Exported functions --------------------------------------------------------*/
|
||||
|
||||
/** @addtogroup TIM6_Exported_Functions
|
||||
* @{
|
||||
*/
|
||||
|
||||
void TIM6_DeInit(void);
|
||||
void TIM6_TimeBaseInit(TIM6_Prescaler_TypeDef TIM6_Prescaler, uint8_t TIM6_Period);
|
||||
void TIM6_Cmd(FunctionalState NewState);
|
||||
void TIM6_UpdateDisableConfig(FunctionalState NewState);
|
||||
void TIM6_UpdateRequestConfig(TIM6_UpdateSource_TypeDef TIM6_UpdateSource);
|
||||
void TIM6_SelectOnePulseMode(TIM6_OPMode_TypeDef TIM6_OPMode);
|
||||
void TIM6_PrescalerConfig(TIM6_Prescaler_TypeDef Prescaler, TIM6_PSCReloadMode_TypeDef TIM6_PSCReloadMode);
|
||||
void TIM6_ARRPreloadConfig(FunctionalState NewState);
|
||||
void TIM6_SetCounter(uint8_t Counter);
|
||||
void TIM6_SetAutoreload(uint8_t Autoreload);
|
||||
uint8_t TIM6_GetCounter(void);
|
||||
TIM6_Prescaler_TypeDef TIM6_GetPrescaler(void);
|
||||
void TIM6_ITConfig(TIM6_IT_TypeDef TIM6_IT, FunctionalState NewState);
|
||||
void TIM6_ClearFlag(TIM6_FLAG_TypeDef TIM6_FLAG);
|
||||
ITStatus TIM6_GetITStatus(TIM6_IT_TypeDef TIM6_IT);
|
||||
void TIM6_GenerateEvent(TIM6_EventSource_TypeDef TIM6_EventSource);
|
||||
FlagStatus TIM6_GetFlagStatus(TIM6_FLAG_TypeDef TIM6_FLAG);
|
||||
void TIM6_ClearITPendingBit(TIM6_IT_TypeDef TIM6_IT);
|
||||
void TIM6_SelectOutputTrigger(TIM6_TRGOSource_TypeDef TIM6_TRGOSource);
|
||||
void TIM6_SelectMasterSlaveMode(FunctionalState NewState);
|
||||
void TIM6_SelectInputTrigger(TIM6_TS_TypeDef TIM6_InputTriggerSource);
|
||||
void TIM6_InternalClockConfig(void);
|
||||
void TIM6_SelectSlaveMode(TIM6_SlaveMode_TypeDef TIM6_SlaveMode);
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
#endif /* __STM8S_TIM6_H */
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
|
||||
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
|
||||
383
Serial/inc/stm8s_uart1.h
Normal file
383
Serial/inc/stm8s_uart1.h
Normal file
@@ -0,0 +1,383 @@
|
||||
/**
|
||||
********************************************************************************
|
||||
* @file stm8s_uart1.h
|
||||
* @author MCD Application Team
|
||||
* @version V2.3.0
|
||||
* @date 16-June-2017
|
||||
* @brief This file contains all functions prototypes and macros for the UART1 peripheral.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© COPYRIGHT 2014 STMicroelectronics</center></h2>
|
||||
*
|
||||
* Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
|
||||
* You may not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at:
|
||||
*
|
||||
* http://www.st.com/software_license_agreement_liberty_v2
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an "AS IS" BASIS,
|
||||
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
/* Define to prevent recursive inclusion -------------------------------------*/
|
||||
#ifndef __STM8S_UART1_H
|
||||
#define __STM8S_UART1_H
|
||||
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
#include "stm8s.h"
|
||||
|
||||
/** @addtogroup STM8S_StdPeriph_Driver
|
||||
* @{
|
||||
*/
|
||||
|
||||
/* Exported types ------------------------------------------------------------*/
|
||||
|
||||
/** @addtogroup UART1_Exported_Types
|
||||
* @{
|
||||
*/
|
||||
|
||||
|
||||
/**
|
||||
* @brief UART1 Irda Modes
|
||||
*/
|
||||
|
||||
typedef enum { UART1_IRDAMODE_NORMAL = (uint8_t)0x00, /**< 0x00 Irda Normal Mode */
|
||||
UART1_IRDAMODE_LOWPOWER = (uint8_t)0x01 /**< 0x01 Irda Low Power Mode */
|
||||
} UART1_IrDAMode_TypeDef;
|
||||
|
||||
/**
|
||||
* @brief UART1 WakeUP Modes
|
||||
*/
|
||||
typedef enum { UART1_WAKEUP_IDLELINE = (uint8_t)0x00, /**< 0x01 Idle Line wake up */
|
||||
UART1_WAKEUP_ADDRESSMARK = (uint8_t)0x08 /**< 0x02 Address Mark wake up */
|
||||
} UART1_WakeUp_TypeDef;
|
||||
|
||||
/**
|
||||
* @brief UART1 LIN Break detection length possible values
|
||||
*/
|
||||
typedef enum { UART1_LINBREAKDETECTIONLENGTH_10BITS = (uint8_t)0x00, /**< 0x01 10 bits Lin Break detection */
|
||||
UART1_LINBREAKDETECTIONLENGTH_11BITS = (uint8_t)0x01 /**< 0x02 11 bits Lin Break detection */
|
||||
} UART1_LINBreakDetectionLength_TypeDef;
|
||||
|
||||
/**
|
||||
* @brief UART1 stop bits possible values
|
||||
*/
|
||||
|
||||
typedef enum { UART1_STOPBITS_1 = (uint8_t)0x00, /**< One stop bit is transmitted at the end of frame*/
|
||||
UART1_STOPBITS_0_5 = (uint8_t)0x10, /**< Half stop bits is transmitted at the end of frame*/
|
||||
UART1_STOPBITS_2 = (uint8_t)0x20, /**< Two stop bits are transmitted at the end of frame*/
|
||||
UART1_STOPBITS_1_5 = (uint8_t)0x30 /**< One and half stop bits*/
|
||||
} UART1_StopBits_TypeDef;
|
||||
|
||||
/**
|
||||
* @brief UART1 parity possible values
|
||||
*/
|
||||
typedef enum { UART1_PARITY_NO = (uint8_t)0x00, /**< No Parity*/
|
||||
UART1_PARITY_EVEN = (uint8_t)0x04, /**< Even Parity*/
|
||||
UART1_PARITY_ODD = (uint8_t)0x06 /**< Odd Parity*/
|
||||
} UART1_Parity_TypeDef;
|
||||
|
||||
/**
|
||||
* @brief UART1 Synchrone modes
|
||||
*/
|
||||
typedef enum { UART1_SYNCMODE_CLOCK_DISABLE = (uint8_t)0x80, /**< 0x80 Sync mode Disable, SLK pin Disable */
|
||||
UART1_SYNCMODE_CLOCK_ENABLE = (uint8_t)0x08, /**< 0x08 Sync mode Enable, SLK pin Enable */
|
||||
UART1_SYNCMODE_CPOL_LOW = (uint8_t)0x40, /**< 0x40 Steady low value on SCLK pin outside transmission window */
|
||||
UART1_SYNCMODE_CPOL_HIGH = (uint8_t)0x04, /**< 0x04 Steady high value on SCLK pin outside transmission window */
|
||||
UART1_SYNCMODE_CPHA_MIDDLE = (uint8_t)0x20, /**< 0x20 SCLK clock line activated in middle of data bit */
|
||||
UART1_SYNCMODE_CPHA_BEGINING = (uint8_t)0x02, /**< 0x02 SCLK clock line activated at beginning of data bit */
|
||||
UART1_SYNCMODE_LASTBIT_DISABLE = (uint8_t)0x10, /**< 0x10 The clock pulse of the last data bit is not output to the SCLK pin */
|
||||
UART1_SYNCMODE_LASTBIT_ENABLE = (uint8_t)0x01 /**< 0x01 The clock pulse of the last data bit is output to the SCLK pin */
|
||||
} UART1_SyncMode_TypeDef;
|
||||
|
||||
/**
|
||||
* @brief UART1 Word length possible values
|
||||
*/
|
||||
typedef enum { UART1_WORDLENGTH_8D = (uint8_t)0x00,/**< 0x00 8 bits Data */
|
||||
UART1_WORDLENGTH_9D = (uint8_t)0x10 /**< 0x10 9 bits Data */
|
||||
} UART1_WordLength_TypeDef;
|
||||
|
||||
/**
|
||||
* @brief UART1 Mode possible values
|
||||
*/
|
||||
typedef enum { UART1_MODE_RX_ENABLE = (uint8_t)0x08, /**< 0x08 Receive Enable */
|
||||
UART1_MODE_TX_ENABLE = (uint8_t)0x04, /**< 0x04 Transmit Enable */
|
||||
UART1_MODE_TX_DISABLE = (uint8_t)0x80, /**< 0x80 Transmit Disable */
|
||||
UART1_MODE_RX_DISABLE = (uint8_t)0x40, /**< 0x40 Single-wire Half-duplex mode */
|
||||
UART1_MODE_TXRX_ENABLE = (uint8_t)0x0C /**< 0x0C Transmit Enable and Receive Enable */
|
||||
} UART1_Mode_TypeDef;
|
||||
|
||||
/**
|
||||
* @brief UART1 Flag possible values
|
||||
*/
|
||||
typedef enum { UART1_FLAG_TXE = (uint16_t)0x0080, /*!< Transmit Data Register Empty flag */
|
||||
UART1_FLAG_TC = (uint16_t)0x0040, /*!< Transmission Complete flag */
|
||||
UART1_FLAG_RXNE = (uint16_t)0x0020, /*!< Read Data Register Not Empty flag */
|
||||
UART1_FLAG_IDLE = (uint16_t)0x0010, /*!< Idle line detected flag */
|
||||
UART1_FLAG_OR = (uint16_t)0x0008, /*!< OverRun error flag */
|
||||
UART1_FLAG_NF = (uint16_t)0x0004, /*!< Noise error flag */
|
||||
UART1_FLAG_FE = (uint16_t)0x0002, /*!< Framing Error flag */
|
||||
UART1_FLAG_PE = (uint16_t)0x0001, /*!< Parity Error flag */
|
||||
UART1_FLAG_LBDF = (uint16_t)0x0210, /*!< Line Break Detection Flag */
|
||||
UART1_FLAG_SBK = (uint16_t)0x0101 /*!< Send Break characters Flag */
|
||||
} UART1_Flag_TypeDef;
|
||||
|
||||
/**
|
||||
* @brief UART1 Interrupt definition
|
||||
* UART1_IT possible values
|
||||
* Elements values convention: 0xZYX
|
||||
* X: Position of the corresponding Interrupt
|
||||
* - For the following values, X means the interrupt position in the CR2 register.
|
||||
* UART1_IT_TXE
|
||||
* UART1_IT_TC
|
||||
* UART1_IT_RXNE
|
||||
* UART1_IT_IDLE
|
||||
* UART1_IT_OR
|
||||
* - For the UART1_IT_PE value, X means the flag position in the CR1 register.
|
||||
* - For the UART1_IT_LBDF value, X means the flag position in the CR4 register.
|
||||
* Y: Flag position
|
||||
* - For the following values, Y means the flag (pending bit) position in the SR register.
|
||||
* UART1_IT_TXE
|
||||
* UART1_IT_TC
|
||||
* UART1_IT_RXNE
|
||||
* UART1_IT_IDLE
|
||||
* UART1_IT_OR
|
||||
* UART1_IT_PE
|
||||
* - For the UART1_IT_LBDF value, Y means the flag position in the CR4 register.
|
||||
* Z: Register index: indicate in which register the dedicated interrupt source is:
|
||||
* - 1==> CR1 register
|
||||
* - 2==> CR2 register
|
||||
* - 3==> CR4 register
|
||||
*/
|
||||
typedef enum { UART1_IT_TXE = (uint16_t)0x0277, /*!< Transmit interrupt */
|
||||
UART1_IT_TC = (uint16_t)0x0266, /*!< Transmission Complete interrupt */
|
||||
UART1_IT_RXNE = (uint16_t)0x0255, /*!< Receive interrupt */
|
||||
UART1_IT_IDLE = (uint16_t)0x0244, /*!< IDLE line interrupt */
|
||||
UART1_IT_OR = (uint16_t)0x0235, /*!< Overrun Error interrupt */
|
||||
UART1_IT_PE = (uint16_t)0x0100, /*!< Parity Error interrupt */
|
||||
UART1_IT_LBDF = (uint16_t)0x0346, /**< LIN break detection interrupt */
|
||||
UART1_IT_RXNE_OR = (uint16_t)0x0205 /*!< Receive/Overrun interrupt */
|
||||
} UART1_IT_TypeDef;
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/* Exported constants --------------------------------------------------------*/
|
||||
/* Exported macros ------------------------------------------------------------*/
|
||||
|
||||
/* Private macros ------------------------------------------------------------*/
|
||||
|
||||
/** @addtogroup UART1_Private_Macros
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @brief Macro used by the assert function to check the different functions parameters.
|
||||
*/
|
||||
|
||||
/**
|
||||
* @brief Macro used by the assert_param function in order to check the different
|
||||
* sensitivity values for the MODEs possible combination should be one of
|
||||
* the following
|
||||
*/
|
||||
#define IS_UART1_MODE_OK(Mode) \
|
||||
(((Mode) == (uint8_t)UART1_MODE_RX_ENABLE) || \
|
||||
((Mode) == (uint8_t)UART1_MODE_RX_DISABLE) || \
|
||||
((Mode) == (uint8_t)UART1_MODE_TX_ENABLE) || \
|
||||
((Mode) == (uint8_t)UART1_MODE_TX_DISABLE) || \
|
||||
((Mode) == (uint8_t)UART1_MODE_TXRX_ENABLE) || \
|
||||
((Mode) == (uint8_t)((uint8_t)UART1_MODE_TX_ENABLE|(uint8_t)UART1_MODE_RX_ENABLE)) || \
|
||||
((Mode) == (uint8_t)((uint8_t)UART1_MODE_TX_ENABLE|(uint8_t)UART1_MODE_RX_DISABLE)) || \
|
||||
((Mode) == (uint8_t)((uint8_t)UART1_MODE_TX_DISABLE|(uint8_t)UART1_MODE_RX_DISABLE)) || \
|
||||
((Mode) == (uint8_t)((uint8_t)UART1_MODE_TX_DISABLE|(uint8_t)UART1_MODE_RX_ENABLE)))
|
||||
|
||||
/**
|
||||
* @brief Macro used by the assert_param function in order to check the different
|
||||
* sensitivity values for the WordLengths
|
||||
*/
|
||||
#define IS_UART1_WORDLENGTH_OK(WordLength) \
|
||||
(((WordLength) == UART1_WORDLENGTH_8D) || \
|
||||
((WordLength) == UART1_WORDLENGTH_9D))
|
||||
|
||||
/**
|
||||
* @brief Macro used by the assert_param function in order to check the different
|
||||
* sensitivity values for the SyncModes; it should exclude values such
|
||||
* as UART1_CLOCK_ENABLE|UART1_CLOCK_DISABLE
|
||||
*/
|
||||
#define IS_UART1_SYNCMODE_OK(SyncMode) \
|
||||
(!((((SyncMode)&(((uint8_t)UART1_SYNCMODE_CLOCK_ENABLE)|((uint8_t)UART1_SYNCMODE_CLOCK_DISABLE))) == (((uint8_t)UART1_SYNCMODE_CLOCK_ENABLE)|((uint8_t)UART1_SYNCMODE_CLOCK_DISABLE))) \
|
||||
|| (((SyncMode)&(((uint8_t)UART1_SYNCMODE_CPOL_LOW )|((uint8_t)UART1_SYNCMODE_CPOL_HIGH))) == (((uint8_t)UART1_SYNCMODE_CPOL_LOW )|((uint8_t)UART1_SYNCMODE_CPOL_HIGH))) \
|
||||
||(((SyncMode)&(((uint8_t)UART1_SYNCMODE_CPHA_MIDDLE)|((uint8_t)UART1_SYNCMODE_CPHA_BEGINING))) == (((uint8_t)UART1_SYNCMODE_CPHA_MIDDLE)|((uint8_t)UART1_SYNCMODE_CPHA_BEGINING))) \
|
||||
|| (((SyncMode)&(((uint8_t)UART1_SYNCMODE_LASTBIT_DISABLE)|((uint8_t)UART1_SYNCMODE_LASTBIT_ENABLE))) == (((uint8_t)UART1_SYNCMODE_LASTBIT_DISABLE)|((uint8_t)UART1_SYNCMODE_LASTBIT_ENABLE)))))
|
||||
|
||||
/**
|
||||
* @brief Macro used by the assert_param function in order to check the different
|
||||
* sensitivity values for the FLAGs
|
||||
*/
|
||||
#define IS_UART1_FLAG_OK(Flag) \
|
||||
(((Flag) == UART1_FLAG_TXE) || \
|
||||
((Flag) == UART1_FLAG_TC) || \
|
||||
((Flag) == UART1_FLAG_RXNE) || \
|
||||
((Flag) == UART1_FLAG_IDLE) || \
|
||||
((Flag) == UART1_FLAG_OR) || \
|
||||
((Flag) == UART1_FLAG_NF) || \
|
||||
((Flag) == UART1_FLAG_FE) || \
|
||||
((Flag) == UART1_FLAG_PE) || \
|
||||
((Flag) == UART1_FLAG_SBK) || \
|
||||
((Flag) == UART1_FLAG_LBDF))
|
||||
/**
|
||||
* @brief Macro used by the assert_param function in order to check the different
|
||||
* sensitivity values for the FLAGs that can be cleared by writing 0
|
||||
*/
|
||||
#define IS_UART1_CLEAR_FLAG_OK(Flag) \
|
||||
(((Flag) == UART1_FLAG_RXNE) || \
|
||||
((Flag) == UART1_FLAG_LBDF))
|
||||
|
||||
|
||||
|
||||
/**
|
||||
* @brief Macro used by the assert_param function in order to check the different
|
||||
* sensitivity values for the Interrupts
|
||||
*/
|
||||
|
||||
#define IS_UART1_CONFIG_IT_OK(Interrupt) \
|
||||
(((Interrupt) == UART1_IT_PE) || \
|
||||
((Interrupt) == UART1_IT_TXE) || \
|
||||
((Interrupt) == UART1_IT_TC) || \
|
||||
((Interrupt) == UART1_IT_RXNE_OR ) || \
|
||||
((Interrupt) == UART1_IT_IDLE) || \
|
||||
((Interrupt) == UART1_IT_LBDF))
|
||||
|
||||
/**
|
||||
* @brief Macro used by the assert function in order to check the different
|
||||
* sensitivity values for the pending bit
|
||||
*/
|
||||
#define IS_UART1_GET_IT_OK(ITPendingBit) \
|
||||
(((ITPendingBit) == UART1_IT_TXE) || \
|
||||
((ITPendingBit) == UART1_IT_TC) || \
|
||||
((ITPendingBit) == UART1_IT_RXNE) || \
|
||||
((ITPendingBit) == UART1_IT_IDLE) || \
|
||||
((ITPendingBit) == UART1_IT_OR) || \
|
||||
((ITPendingBit) == UART1_IT_LBDF) || \
|
||||
((ITPendingBit) == UART1_IT_PE))
|
||||
|
||||
/**
|
||||
* @brief Macro used by the assert function in order to check the different
|
||||
* sensitivity values for the pending bit that can be cleared by writing 0
|
||||
*/
|
||||
#define IS_UART1_CLEAR_IT_OK(ITPendingBit) \
|
||||
(((ITPendingBit) == UART1_IT_RXNE) || \
|
||||
((ITPendingBit) == UART1_IT_LBDF))
|
||||
|
||||
|
||||
/**
|
||||
* @brief Macro used by the assert_param function in order to check the different
|
||||
* sensitivity values for the IrDAModes
|
||||
*/
|
||||
#define IS_UART1_IRDAMODE_OK(IrDAMode) \
|
||||
(((IrDAMode) == UART1_IRDAMODE_LOWPOWER) || \
|
||||
((IrDAMode) == UART1_IRDAMODE_NORMAL))
|
||||
|
||||
/**
|
||||
* @brief Macro used by the assert_param function in order to check the different
|
||||
* sensitivity values for the WakeUps
|
||||
*/
|
||||
#define IS_UART1_WAKEUP_OK(WakeUp) \
|
||||
(((WakeUp) == UART1_WAKEUP_IDLELINE) || \
|
||||
((WakeUp) == UART1_WAKEUP_ADDRESSMARK))
|
||||
|
||||
/**
|
||||
* @brief Macro used by the assert_param function in order to check the different
|
||||
* sensitivity values for the LINBreakDetectionLengths
|
||||
*/
|
||||
#define IS_UART1_LINBREAKDETECTIONLENGTH_OK(LINBreakDetectionLength) \
|
||||
(((LINBreakDetectionLength) == UART1_LINBREAKDETECTIONLENGTH_10BITS) || \
|
||||
((LINBreakDetectionLength) == UART1_LINBREAKDETECTIONLENGTH_11BITS))
|
||||
|
||||
/**
|
||||
* @brief Macro used by the assert_param function in order to check the different
|
||||
* sensitivity values for the UART1_StopBits
|
||||
*/
|
||||
#define IS_UART1_STOPBITS_OK(StopBit) (((StopBit) == UART1_STOPBITS_1) || \
|
||||
((StopBit) == UART1_STOPBITS_0_5) || \
|
||||
((StopBit) == UART1_STOPBITS_2) || \
|
||||
((StopBit) == UART1_STOPBITS_1_5 ))
|
||||
|
||||
/**
|
||||
* @brief Macro used by the assert_param function in order to check the different
|
||||
* sensitivity values for the Parity
|
||||
*/
|
||||
#define IS_UART1_PARITY_OK(Parity) (((Parity) == UART1_PARITY_NO) || \
|
||||
((Parity) == UART1_PARITY_EVEN) || \
|
||||
((Parity) == UART1_PARITY_ODD ))
|
||||
|
||||
/**
|
||||
* @brief Macro used by the assert_param function in order to check the maximum
|
||||
* baudrate value
|
||||
*/
|
||||
#define IS_UART1_BAUDRATE_OK(NUM) ((NUM) <= (uint32_t)625000)
|
||||
|
||||
|
||||
/**
|
||||
* @brief Macro used by the assert_param function in order to check the address
|
||||
* of the UART1 or UART node
|
||||
*/
|
||||
#define UART1_ADDRESS_MAX ((uint8_t)16)
|
||||
#define IS_UART1_ADDRESS_OK(node) ((node) < UART1_ADDRESS_MAX )
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/* Exported functions ------------------------------------------------------- */
|
||||
|
||||
/** @addtogroup UART1_Exported_Functions
|
||||
* @{
|
||||
*/
|
||||
|
||||
void UART1_DeInit(void);
|
||||
void UART1_Init(uint32_t BaudRate, UART1_WordLength_TypeDef WordLength,
|
||||
UART1_StopBits_TypeDef StopBits, UART1_Parity_TypeDef Parity,
|
||||
UART1_SyncMode_TypeDef SyncMode, UART1_Mode_TypeDef Mode);
|
||||
void UART1_Cmd(FunctionalState NewState);
|
||||
void UART1_ITConfig(UART1_IT_TypeDef UART1_IT, FunctionalState NewState);
|
||||
void UART1_HalfDuplexCmd(FunctionalState NewState);
|
||||
void UART1_IrDAConfig(UART1_IrDAMode_TypeDef UART1_IrDAMode);
|
||||
void UART1_IrDACmd(FunctionalState NewState);
|
||||
void UART1_LINBreakDetectionConfig(UART1_LINBreakDetectionLength_TypeDef UART1_LINBreakDetectionLength);
|
||||
void UART1_LINCmd(FunctionalState NewState);
|
||||
void UART1_SmartCardCmd(FunctionalState NewState);
|
||||
void UART1_SmartCardNACKCmd(FunctionalState NewState);
|
||||
void UART1_WakeUpConfig(UART1_WakeUp_TypeDef UART1_WakeUp);
|
||||
void UART1_ReceiverWakeUpCmd(FunctionalState NewState);
|
||||
uint8_t UART1_ReceiveData8(void);
|
||||
uint16_t UART1_ReceiveData9(void);
|
||||
void UART1_SendData8(uint8_t Data);
|
||||
void UART1_SendData9(uint16_t Data);
|
||||
void UART1_SendBreak(void);
|
||||
void UART1_SetAddress(uint8_t UART1_Address);
|
||||
void UART1_SetGuardTime(uint8_t UART1_GuardTime);
|
||||
void UART1_SetPrescaler(uint8_t UART1_Prescaler);
|
||||
FlagStatus UART1_GetFlagStatus(UART1_Flag_TypeDef UART1_FLAG);
|
||||
void UART1_ClearFlag(UART1_Flag_TypeDef UART1_FLAG);
|
||||
ITStatus UART1_GetITStatus(UART1_IT_TypeDef UART1_IT);
|
||||
void UART1_ClearITPendingBit(UART1_IT_TypeDef UART1_IT);
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
#endif /* __STM8S_UART1_H */
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
|
||||
447
Serial/inc/stm8s_uart2.h
Normal file
447
Serial/inc/stm8s_uart2.h
Normal file
@@ -0,0 +1,447 @@
|
||||
/**
|
||||
********************************************************************************
|
||||
* @file stm8s_uart2.h
|
||||
* @author MCD Application Team
|
||||
* @version V2.3.0
|
||||
* @date 16-June-2017
|
||||
* @brief This file contains all functions prototypes and macros for the UART2 peripheral.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© COPYRIGHT 2014 STMicroelectronics</center></h2>
|
||||
*
|
||||
* Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
|
||||
* You may not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at:
|
||||
*
|
||||
* http://www.st.com/software_license_agreement_liberty_v2
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an "AS IS" BASIS,
|
||||
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
/* Define to prevent recursive inclusion -------------------------------------*/
|
||||
#ifndef __STM8S_UART2_H
|
||||
#define __STM8S_UART2_H
|
||||
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
#include "stm8s.h"
|
||||
|
||||
/** @addtogroup STM8S_StdPeriph_Driver
|
||||
* @{
|
||||
*/
|
||||
|
||||
/* Exported types ------------------------------------------------------------*/
|
||||
|
||||
/** @addtogroup UART2_Exported_Types
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @brief UART2 Irda Modes
|
||||
*/
|
||||
|
||||
typedef enum { UART2_IRDAMODE_NORMAL = (uint8_t)0x00, /**< 0x00 Irda Normal Mode */
|
||||
UART2_IRDAMODE_LOWPOWER = (uint8_t)0x01 /**< 0x01 Irda Low Power Mode */
|
||||
|
||||
} UART2_IrDAMode_TypeDef;
|
||||
|
||||
/**
|
||||
* @brief UART2 WakeUP Modes
|
||||
*/
|
||||
|
||||
typedef enum { UART2_WAKEUP_IDLELINE = (uint8_t)0x00, /**< 0x01 Idle Line wake up */
|
||||
UART2_WAKEUP_ADDRESSMARK = (uint8_t)0x08 /**< 0x02 Address Mark wake up */
|
||||
} UART2_WakeUp_TypeDef;
|
||||
|
||||
|
||||
/**
|
||||
* @brief UART2 LIN Break detection length possible values
|
||||
*/
|
||||
typedef enum { UART2_LINBREAKDETECTIONLENGTH_10BITS = (uint8_t)0x00, /**< 0x01 10 bits Lin Break detection */
|
||||
UART2_LINBREAKDETECTIONLENGTH_11BITS = (uint8_t)0x01 /**< 0x02 11 bits Lin Break detection */
|
||||
} UART2_LINBreakDetectionLength_TypeDef;
|
||||
|
||||
/**
|
||||
* @brief UART2 stop bits possible values
|
||||
*/
|
||||
|
||||
typedef enum { UART2_STOPBITS_1 = (uint8_t)0x00, /**< One stop bit is transmitted at the end of frame*/
|
||||
UART2_STOPBITS_0_5 = (uint8_t)0x10, /**< Half stop bits is transmitted at the end of frame*/
|
||||
UART2_STOPBITS_2 = (uint8_t)0x20, /**< Two stop bits are transmitted at the end of frame*/
|
||||
UART2_STOPBITS_1_5 = (uint8_t)0x30 /**< One and half stop bits*/
|
||||
} UART2_StopBits_TypeDef;
|
||||
|
||||
|
||||
/**
|
||||
* @brief UART2 parity possible values
|
||||
*/
|
||||
typedef enum { UART2_PARITY_NO = (uint8_t)0x00, /**< No Parity*/
|
||||
UART2_PARITY_EVEN = (uint8_t)0x04, /**< Even Parity*/
|
||||
UART2_PARITY_ODD = (uint8_t)0x06 /**< Odd Parity*/
|
||||
} UART2_Parity_TypeDef;
|
||||
/**
|
||||
* @brief UART2 Mode possible values
|
||||
*/
|
||||
typedef enum { UART2_LIN_MODE_MASTER = (uint8_t)0x00, /**< LIN Master Mode*/
|
||||
UART2_LIN_MODE_SLAVE = (uint8_t)0x01 /**< LIN Slave Mode*/
|
||||
} UART2_LinMode_TypeDef;
|
||||
/**
|
||||
* @brief UART2 automatic resynchronisation possible values
|
||||
*/
|
||||
typedef enum { UART2_LIN_AUTOSYNC_DISABLE = (uint8_t)0x00, /**< LIN Autosynchronization Disable*/
|
||||
UART2_LIN_AUTOSYNC_ENABLE = (uint8_t)0x01 /**< LIN Autosynchronization Enable*/
|
||||
} UART2_LinAutosync_TypeDef;
|
||||
/**
|
||||
* @brief UART2 Divider Update Method possible values
|
||||
*/
|
||||
typedef enum { UART2_LIN_DIVUP_LBRR1 = (uint8_t)0x00, /**< LIN LDIV is updated as soon as LBRR1 is written*/
|
||||
UART2_LIN_DIVUP_NEXTRXNE = (uint8_t)0x01 /**< LIN LDIV is updated at the next received character*/
|
||||
} UART2_LinDivUp_TypeDef;
|
||||
|
||||
/**
|
||||
* @brief UART2 Synchrone modes
|
||||
*/
|
||||
typedef enum { UART2_SYNCMODE_CLOCK_DISABLE = (uint8_t)0x80, /**< 0x80 Sync mode Disable, SLK pin Disable */
|
||||
UART2_SYNCMODE_CLOCK_ENABLE = (uint8_t)0x08, /**< 0x08 Sync mode Enable, SLK pin Enable */
|
||||
UART2_SYNCMODE_CPOL_LOW = (uint8_t)0x40, /**< 0x40 Steady low value on SCLK pin outside transmission window */
|
||||
UART2_SYNCMODE_CPOL_HIGH = (uint8_t)0x04, /**< 0x04 Steady high value on SCLK pin outside transmission window */
|
||||
UART2_SYNCMODE_CPHA_MIDDLE = (uint8_t)0x20, /**< 0x20 SCLK clock line activated in middle of data bit */
|
||||
UART2_SYNCMODE_CPHA_BEGINING = (uint8_t)0x02, /**< 0x02 SCLK clock line activated at beginning of data bit */
|
||||
UART2_SYNCMODE_LASTBIT_DISABLE = (uint8_t)0x10, /**< 0x10 The clock pulse of the last data bit is not output to the SCLK pin */
|
||||
UART2_SYNCMODE_LASTBIT_ENABLE = (uint8_t)0x01 /**< 0x01 The clock pulse of the last data bit is output to the SCLK pin */
|
||||
} UART2_SyncMode_TypeDef;
|
||||
|
||||
/**
|
||||
* @brief UART2 Word length possible values
|
||||
*/
|
||||
typedef enum { UART2_WORDLENGTH_8D = (uint8_t)0x00,/**< 0x00 8 bits Data */
|
||||
UART2_WORDLENGTH_9D = (uint8_t)0x10 /**< 0x10 9 bits Data */
|
||||
} UART2_WordLength_TypeDef;
|
||||
|
||||
/**
|
||||
* @brief UART2 Mode possible values
|
||||
*/
|
||||
typedef enum { UART2_MODE_RX_ENABLE = (uint8_t)0x08, /**< 0x08 Receive Enable */
|
||||
UART2_MODE_TX_ENABLE = (uint8_t)0x04, /**< 0x04 Transmit Enable */
|
||||
UART2_MODE_TX_DISABLE = (uint8_t)0x80, /**< 0x80 Transmit Disable */
|
||||
UART2_MODE_RX_DISABLE = (uint8_t)0x40, /**< 0x40 Single-wire Half-duplex mode */
|
||||
UART2_MODE_TXRX_ENABLE = (uint8_t)0x0C /**< 0x0C Transmit Enable and Receive Enable */
|
||||
} UART2_Mode_TypeDef;
|
||||
/**
|
||||
* @brief UART2 Flag possible values
|
||||
*/
|
||||
typedef enum
|
||||
{
|
||||
UART2_FLAG_TXE = (uint16_t)0x0080, /*!< Transmit Data Register Empty flag */
|
||||
UART2_FLAG_TC = (uint16_t)0x0040, /*!< Transmission Complete flag */
|
||||
UART2_FLAG_RXNE = (uint16_t)0x0020, /*!< Read Data Register Not Empty flag */
|
||||
UART2_FLAG_IDLE = (uint16_t)0x0010, /*!< Idle line detected flag */
|
||||
UART2_FLAG_OR_LHE = (uint16_t)0x0008, /*!< OverRun error flag */
|
||||
UART2_FLAG_NF = (uint16_t)0x0004, /*!< Noise error flag */
|
||||
UART2_FLAG_FE = (uint16_t)0x0002, /*!< Framing Error flag */
|
||||
UART2_FLAG_PE = (uint16_t)0x0001, /*!< Parity Error flag */
|
||||
UART2_FLAG_SBK = (uint16_t)0x0101, /**< Send Break Complete interrupt flag */
|
||||
UART2_FLAG_LBDF = (uint16_t)0x0210, /**< LIN Break Detection Flag */
|
||||
UART2_FLAG_LHDF = (uint16_t)0x0302, /**< LIN Header Detection Flag*/
|
||||
UART2_FLAG_LSF = (uint16_t)0x0301 /**< LIN Sync Field Flag*/
|
||||
} UART2_Flag_TypeDef;
|
||||
|
||||
/**
|
||||
* @brief UART2 Interrupt definition
|
||||
* UART2_IT possible values
|
||||
* Elements values convention: 0xZYX
|
||||
* X: Position of the corresponding Interrupt
|
||||
* - For the following values, X means the interrupt position in the CR2 register.
|
||||
* UART2_IT_TXE
|
||||
* UART2_IT_TC
|
||||
* UART2_IT_RXNE
|
||||
* UART2_IT_IDLE
|
||||
* UART2_IT_OR
|
||||
* - For the UART2_IT_PE value, X means the flag position in the CR1 register.
|
||||
* - For the UART2_IT_LBDF value, X means the flag position in the CR4 register.
|
||||
* - For the UART2_IT_LHDF value, X means the flag position in the CR6 register.
|
||||
* Y: Flag position
|
||||
* - For the following values, Y means the flag (pending bit) position in the SR register.
|
||||
* UART2_IT_TXE
|
||||
* UART2_IT_TC
|
||||
* UART2_IT_RXNE
|
||||
* UART2_IT_IDLE
|
||||
* UART2_IT_OR
|
||||
* UART2_IT_PE
|
||||
* - For the UART2_IT_LBDF value, Y means the flag position in the CR4 register.
|
||||
* - For the UART2_IT_LHDF value, Y means the flag position in the CR6 register.
|
||||
* Z: Register index: indicate in which register the dedicated interrupt source is:
|
||||
* - 1==> CR1 register
|
||||
* - 2==> CR2 register
|
||||
* - 3==> CR4 register
|
||||
* - 4==> CR6 register
|
||||
*/
|
||||
typedef enum { UART2_IT_TXE = (uint16_t)0x0277, /**< Transmit interrupt */
|
||||
UART2_IT_TC = (uint16_t)0x0266, /**< Transmission Complete interrupt */
|
||||
UART2_IT_RXNE = (uint16_t)0x0255, /**< Data Register Not Empty interrupt */
|
||||
UART2_IT_IDLE = (uint16_t)0x0244, /**< Idle line detected interrupt */
|
||||
UART2_IT_OR = (uint16_t)0x0235, /**< OverRun error interrupt */
|
||||
UART2_IT_PE = (uint16_t)0x0100, /**< Parity Error interrupt */
|
||||
UART2_IT_LBDF = (uint16_t)0x0346, /**< LIN Break Detection interrupt */
|
||||
UART2_IT_LHDF = (uint16_t)0x0412, /**< LIN Header Detection interrupt*/
|
||||
UART2_IT_RXNE_OR = (uint16_t)0x0205 /*!< Receive/Overrun interrupt */
|
||||
} UART2_IT_TypeDef;
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/* Exported constants --------------------------------------------------------*/
|
||||
/* Exported macros ------------------------------------------------------------*/
|
||||
|
||||
/* Private macros ------------------------------------------------------------*/
|
||||
|
||||
/** @addtogroup UART2_Private_Macros
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @brief Macro used by the assert function to check the different functions parameters.
|
||||
*/
|
||||
|
||||
/**
|
||||
* @brief Macro used by the assert_param function in order to check the different
|
||||
* sensitivity values for the MODEs possible combination should be one of
|
||||
* the following.
|
||||
*/
|
||||
|
||||
#define IS_UART2_MODE_OK(Mode) \
|
||||
(((Mode) == (uint8_t)UART2_MODE_RX_ENABLE) || \
|
||||
((Mode) == (uint8_t)UART2_MODE_RX_DISABLE) || \
|
||||
((Mode) == (uint8_t)UART2_MODE_TX_ENABLE) || \
|
||||
((Mode) == (uint8_t)UART2_MODE_TX_DISABLE) || \
|
||||
((Mode) == (uint8_t)UART2_MODE_TXRX_ENABLE) || \
|
||||
((Mode) == (uint8_t)((uint8_t)UART2_MODE_TX_ENABLE|(uint8_t)UART2_MODE_RX_ENABLE)) || \
|
||||
((Mode) == (uint8_t)((uint8_t)UART2_MODE_TX_ENABLE|(uint8_t)UART2_MODE_RX_DISABLE)) || \
|
||||
((Mode) == (uint8_t)((uint8_t)UART2_MODE_TX_DISABLE|(uint8_t)UART2_MODE_RX_DISABLE)) || \
|
||||
((Mode) == (uint8_t)((uint8_t)UART2_MODE_TX_DISABLE|(uint8_t)UART2_MODE_RX_ENABLE)))
|
||||
|
||||
/**
|
||||
* @brief Macro used by the assert_param function in order to check the different
|
||||
* sensitivity values for the WordLengths
|
||||
*/
|
||||
#define IS_UART2_WORDLENGTH_OK(WordLength) \
|
||||
(((WordLength) == UART2_WORDLENGTH_8D) || \
|
||||
((WordLength) == UART2_WORDLENGTH_9D))
|
||||
|
||||
/**
|
||||
* @brief Macro used by the assert_param function in order to check the different
|
||||
* sensitivity values for the SyncModes; it should exclude values such
|
||||
* as UART2_CLOCK_ENABLE|UART2_CLOCK_DISABLE
|
||||
*/
|
||||
#define IS_UART2_SYNCMODE_OK(SyncMode) \
|
||||
(!((((SyncMode)&(((uint8_t)UART2_SYNCMODE_CLOCK_ENABLE)|((uint8_t)UART2_SYNCMODE_CLOCK_DISABLE))) == (((uint8_t)UART2_SYNCMODE_CLOCK_ENABLE)|((uint8_t)UART2_SYNCMODE_CLOCK_DISABLE))) || \
|
||||
(((SyncMode)&(((uint8_t)UART2_SYNCMODE_CPOL_LOW )|((uint8_t)UART2_SYNCMODE_CPOL_HIGH))) == (((uint8_t)UART2_SYNCMODE_CPOL_LOW )|((uint8_t)UART2_SYNCMODE_CPOL_HIGH))) || \
|
||||
(((SyncMode)&(((uint8_t)UART2_SYNCMODE_CPHA_MIDDLE)|((uint8_t)UART2_SYNCMODE_CPHA_BEGINING))) == (((uint8_t)UART2_SYNCMODE_CPHA_MIDDLE)|((uint8_t)UART2_SYNCMODE_CPHA_BEGINING))) || \
|
||||
(((SyncMode)&(((uint8_t)UART2_SYNCMODE_LASTBIT_DISABLE)|((uint8_t)UART2_SYNCMODE_LASTBIT_ENABLE))) == (((uint8_t)UART2_SYNCMODE_LASTBIT_DISABLE)|((uint8_t)UART2_SYNCMODE_LASTBIT_ENABLE)))))
|
||||
|
||||
/**
|
||||
* @brief Macro used by the assert_param function in order to check the
|
||||
* different sensitivity values for the FLAGs
|
||||
*/
|
||||
#define IS_UART2_FLAG_OK(Flag) \
|
||||
(((Flag) == UART2_FLAG_TXE) || \
|
||||
((Flag) == UART2_FLAG_TC) || \
|
||||
((Flag) == UART2_FLAG_RXNE) || \
|
||||
((Flag) == UART2_FLAG_IDLE) || \
|
||||
((Flag) == UART2_FLAG_OR_LHE) || \
|
||||
((Flag) == UART2_FLAG_NF) || \
|
||||
((Flag) == UART2_FLAG_FE) || \
|
||||
((Flag) == UART2_FLAG_PE) || \
|
||||
((Flag) == UART2_FLAG_SBK) || \
|
||||
((Flag) == UART2_FLAG_LSF) || \
|
||||
((Flag) == UART2_FLAG_LHDF) || \
|
||||
((Flag) == UART2_FLAG_LBDF))
|
||||
|
||||
|
||||
/**
|
||||
* @brief Macro used by the assert_param function in order to check the
|
||||
* different sensitivity values for the FLAGs that can be cleared by writing 0
|
||||
*/
|
||||
#define IS_UART2_CLEAR_FLAG_OK(Flag) \
|
||||
(((Flag) == UART2_FLAG_RXNE) || \
|
||||
((Flag) == UART2_FLAG_LHDF) || \
|
||||
((Flag) == UART2_FLAG_LSF) || \
|
||||
((Flag) == UART2_FLAG_LBDF))
|
||||
|
||||
/**
|
||||
* @brief Macro used by the assert_param function in order to check
|
||||
* the different sensitivity values for the Interrupts
|
||||
*/
|
||||
|
||||
#define IS_UART2_CONFIG_IT_OK(Interrupt) \
|
||||
(((Interrupt) == UART2_IT_PE) || \
|
||||
((Interrupt) == UART2_IT_TXE) || \
|
||||
((Interrupt) == UART2_IT_TC) || \
|
||||
((Interrupt) == UART2_IT_RXNE_OR ) || \
|
||||
((Interrupt) == UART2_IT_IDLE) || \
|
||||
((Interrupt) == UART2_IT_LHDF) || \
|
||||
((Interrupt) == UART2_IT_LBDF))
|
||||
|
||||
/**
|
||||
* @brief Macro used by the assert function in order to check the different
|
||||
* sensitivity values for the pending bit
|
||||
*/
|
||||
#define IS_UART2_GET_IT_OK(ITPendingBit) \
|
||||
(((ITPendingBit) == UART2_IT_TXE) || \
|
||||
((ITPendingBit) == UART2_IT_TC) || \
|
||||
((ITPendingBit) == UART2_IT_RXNE) || \
|
||||
((ITPendingBit) == UART2_IT_IDLE) || \
|
||||
((ITPendingBit) == UART2_IT_OR) || \
|
||||
((ITPendingBit) == UART2_IT_LBDF) || \
|
||||
((ITPendingBit) == UART2_IT_LHDF) || \
|
||||
((ITPendingBit) == UART2_IT_PE))
|
||||
|
||||
/**
|
||||
* @brief Macro used by the assert function in order to check the different
|
||||
* sensitivity values for the pending bit that can be cleared by writing 0
|
||||
*/
|
||||
#define IS_UART2_CLEAR_IT_OK(ITPendingBit) \
|
||||
(((ITPendingBit) == UART2_IT_RXNE) || \
|
||||
((ITPendingBit) == UART2_IT_LHDF) || \
|
||||
((ITPendingBit) == UART2_IT_LBDF))
|
||||
|
||||
|
||||
/**
|
||||
* @brief Macro used by the assert_param function in order to check the different
|
||||
* sensitivity values for the IrDAModes
|
||||
*/
|
||||
#define IS_UART2_IRDAMODE_OK(IrDAMode) \
|
||||
(((IrDAMode) == UART2_IRDAMODE_LOWPOWER) || \
|
||||
((IrDAMode) == UART2_IRDAMODE_NORMAL))
|
||||
|
||||
/**
|
||||
* @brief Macro used by the assert_param function in order to check the different
|
||||
* sensitivity values for the WakeUps
|
||||
*/
|
||||
#define IS_UART2_WAKEUP_OK(WakeUp) \
|
||||
(((WakeUp) == UART2_WAKEUP_IDLELINE) || \
|
||||
((WakeUp) == UART2_WAKEUP_ADDRESSMARK))
|
||||
|
||||
/**
|
||||
* @brief Macro used by the assert_param function in order to check the different
|
||||
* sensitivity values for the LINBreakDetectionLengths
|
||||
*/
|
||||
#define IS_UART2_LINBREAKDETECTIONLENGTH_OK(LINBreakDetectionLength) \
|
||||
(((LINBreakDetectionLength) == UART2_LINBREAKDETECTIONLENGTH_10BITS) || \
|
||||
((LINBreakDetectionLength) == UART2_LINBREAKDETECTIONLENGTH_11BITS))
|
||||
|
||||
/**
|
||||
* @brief Macro used by the assert_param function in order to check the different
|
||||
* sensitivity values for the UART2_StopBits
|
||||
*/
|
||||
#define IS_UART2_STOPBITS_OK(StopBit) (((StopBit) == UART2_STOPBITS_1) || \
|
||||
((StopBit) == UART2_STOPBITS_0_5) || \
|
||||
((StopBit) == UART2_STOPBITS_2) || \
|
||||
((StopBit) == UART2_STOPBITS_1_5 ))
|
||||
|
||||
/**
|
||||
* @brief Macro used by the assert_param function in order to check the different
|
||||
* sensitivity values for the Paritys
|
||||
*/
|
||||
#define IS_UART2_PARITY_OK(Parity) (((Parity) == UART2_PARITY_NO) || \
|
||||
((Parity) == UART2_PARITY_EVEN) || \
|
||||
((Parity) == UART2_PARITY_ODD ))
|
||||
|
||||
/**
|
||||
* @brief Macro used by the assert_param function in order to check the maximum
|
||||
* baudrate value
|
||||
*/
|
||||
#define IS_UART2_BAUDRATE_OK(NUM) ((NUM) <= (uint32_t)625000)
|
||||
|
||||
|
||||
/**
|
||||
* @brief Macro used by the assert_param function in order to check the address
|
||||
* of the UART2 or UART node
|
||||
*/
|
||||
#define UART2_ADDRESS_MAX ((uint8_t)16)
|
||||
#define IS_UART2_ADDRESS_OK(node) ((node) < UART2_ADDRESS_MAX )
|
||||
|
||||
/**
|
||||
* @brief Macro used by the assert_param function in order to check the LIN mode
|
||||
*/
|
||||
#define IS_UART2_SLAVE_OK(Mode) \
|
||||
(((Mode) == UART2_LIN_MODE_MASTER) || \
|
||||
((Mode) == UART2_LIN_MODE_SLAVE))
|
||||
|
||||
/**
|
||||
* @brief Macro used by the assert_param function in order to check the LIN
|
||||
* automatic resynchronization mode
|
||||
*/
|
||||
#define IS_UART2_AUTOSYNC_OK(AutosyncMode) \
|
||||
(((AutosyncMode) == UART2_LIN_AUTOSYNC_ENABLE) || \
|
||||
((AutosyncMode) == UART2_LIN_AUTOSYNC_DISABLE))
|
||||
|
||||
/**
|
||||
* @brief Macro used by the assert_param function in order to check the LIN divider update method
|
||||
*/
|
||||
#define IS_UART2_DIVUP_OK(DivupMethod) \
|
||||
(((DivupMethod) == UART2_LIN_DIVUP_LBRR1) || \
|
||||
((DivupMethod) == UART2_LIN_DIVUP_NEXTRXNE))
|
||||
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/* Exported functions ------------------------------------------------------- */
|
||||
|
||||
/** @addtogroup UART2_Exported_Functions
|
||||
* @{
|
||||
*/
|
||||
|
||||
void UART2_DeInit(void);
|
||||
void UART2_Init(uint32_t BaudRate, UART2_WordLength_TypeDef WordLength,
|
||||
UART2_StopBits_TypeDef StopBits, UART2_Parity_TypeDef Parity,
|
||||
UART2_SyncMode_TypeDef SyncMode, UART2_Mode_TypeDef Mode);
|
||||
void UART2_Cmd(FunctionalState NewState);
|
||||
void UART2_ITConfig(UART2_IT_TypeDef UART2_IT, FunctionalState NewState);
|
||||
void UART2_HalfDuplexCmd(FunctionalState NewState);
|
||||
void UART2_IrDAConfig(UART2_IrDAMode_TypeDef UART2_IrDAMode);
|
||||
void UART2_IrDACmd(FunctionalState NewState);
|
||||
void UART2_LINBreakDetectionConfig(UART2_LINBreakDetectionLength_TypeDef UART2_LINBreakDetectionLength);
|
||||
void UART2_LINConfig(UART2_LinMode_TypeDef UART2_Mode,
|
||||
UART2_LinAutosync_TypeDef UART2_Autosync,
|
||||
UART2_LinDivUp_TypeDef UART2_DivUp);
|
||||
void UART2_LINCmd(FunctionalState NewState);
|
||||
void UART2_SmartCardCmd(FunctionalState NewState);
|
||||
void UART2_SmartCardNACKCmd(FunctionalState NewState);
|
||||
void UART2_WakeUpConfig(UART2_WakeUp_TypeDef UART2_WakeUp);
|
||||
void UART2_ReceiverWakeUpCmd(FunctionalState NewState);
|
||||
uint8_t UART2_ReceiveData8(void);
|
||||
uint16_t UART2_ReceiveData9(void);
|
||||
void UART2_SendData8(uint8_t Data);
|
||||
void UART2_SendData9(uint16_t Data);
|
||||
void UART2_SendBreak(void);
|
||||
void UART2_SetAddress(uint8_t UART2_Address);
|
||||
void UART2_SetGuardTime(uint8_t UART2_GuardTime);
|
||||
void UART2_SetPrescaler(uint8_t UART2_Prescaler);
|
||||
FlagStatus UART2_GetFlagStatus(UART2_Flag_TypeDef UART2_FLAG);
|
||||
void UART2_ClearFlag(UART2_Flag_TypeDef UART2_FLAG);
|
||||
ITStatus UART2_GetITStatus(UART2_IT_TypeDef UART2_IT);
|
||||
void UART2_ClearITPendingBit(UART2_IT_TypeDef UART2_IT);
|
||||
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
#endif /* __STM8S_UART2_H */
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
|
||||
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
|
||||
389
Serial/inc/stm8s_uart3.h
Normal file
389
Serial/inc/stm8s_uart3.h
Normal file
@@ -0,0 +1,389 @@
|
||||
/**
|
||||
********************************************************************************
|
||||
* @file stm8s_uart3.h
|
||||
* @author MCD Application Team
|
||||
* @version V2.3.0
|
||||
* @date 16-June-2017
|
||||
* @brief This file contains all functions prototypes and macros for the UART3 peripheral.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© COPYRIGHT 2014 STMicroelectronics</center></h2>
|
||||
*
|
||||
* Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
|
||||
* You may not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at:
|
||||
*
|
||||
* http://www.st.com/software_license_agreement_liberty_v2
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an "AS IS" BASIS,
|
||||
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
/* Define to prevent recursive inclusion -------------------------------------*/
|
||||
#ifndef __STM8S_UART3_H
|
||||
#define __STM8S_UART3_H
|
||||
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
#include "stm8s.h"
|
||||
|
||||
/** @addtogroup STM8S_StdPeriph_Driver
|
||||
* @{
|
||||
*/
|
||||
|
||||
/* Exported types ------------------------------------------------------------*/
|
||||
|
||||
/** @addtogroup UART3_Exported_Types
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @brief UART3 WakeUP Modes
|
||||
*/
|
||||
typedef enum { UART3_WAKEUP_IDLELINE = (uint8_t)0x00, /**< 0x01 Idle Line wake up*/
|
||||
UART3_WAKEUP_ADDRESSMARK = (uint8_t)0x08 /**< 0x02 Address Mark wake up*/
|
||||
} UART3_WakeUp_TypeDef;
|
||||
|
||||
/**
|
||||
* @brief UART3 LIN Break detection length possible values
|
||||
*/
|
||||
typedef enum { UART3_LINBREAKDETECTIONLENGTH_10BITS = (uint8_t)0x00, /**< 10 bits Lin Break detection */
|
||||
UART3_LINBREAKDETECTIONLENGTH_11BITS = (uint8_t)0x01 /**< 11 bits Lin Break detection */
|
||||
} UART3_LINBreakDetectionLength_TypeDef;
|
||||
|
||||
|
||||
/**
|
||||
* @brief UART3 stop bits possible values
|
||||
*/
|
||||
typedef enum { UART3_STOPBITS_1 = (uint8_t)0x00, /**< One stop bit is transmitted at the end of frame*/
|
||||
UART3_STOPBITS_2 = (uint8_t)0x20 /**< Two stop bits are transmitted at the end of frame*/
|
||||
} UART3_StopBits_TypeDef;
|
||||
|
||||
/**
|
||||
* @brief UART3 parity possible values
|
||||
*/
|
||||
typedef enum { UART3_PARITY_NO = (uint8_t)0x00, /**< No Parity*/
|
||||
UART3_PARITY_EVEN = (uint8_t)0x04, /**< Even Parity*/
|
||||
UART3_PARITY_ODD = (uint8_t)0x06 /**< Odd Parity*/
|
||||
} UART3_Parity_TypeDef;
|
||||
|
||||
/**
|
||||
* @brief UART3 Word length possible values
|
||||
*/
|
||||
typedef enum { UART3_WORDLENGTH_8D = (uint8_t)0x00, /**< 0x00 8 bits Data*/
|
||||
UART3_WORDLENGTH_9D = (uint8_t)0x10 /**< 0x10 9 bits Data*/
|
||||
} UART3_WordLength_TypeDef;
|
||||
|
||||
/**
|
||||
* @brief UART3 Mode Transmit/Receive possible values
|
||||
*/
|
||||
typedef enum { UART3_MODE_RX_ENABLE = (uint8_t)0x08, /**< 0x08 Receive Enable*/
|
||||
UART3_MODE_TX_ENABLE = (uint8_t)0x04, /**< 0x04 Transmit Enable*/
|
||||
UART3_MODE_TX_DISABLE = (uint8_t)0x80, /**< 0x80 Receive Enable*/
|
||||
UART3_MODE_RX_DISABLE = (uint8_t)0x40, /**< 0x40 Single-wire Half-duplex mode*/
|
||||
UART3_MODE_TXRX_ENABLE = (uint8_t)0x0C /**< 0x0C Receive Enable and Transmit enable*/
|
||||
} UART3_Mode_TypeDef;
|
||||
|
||||
/**
|
||||
* @brief UART3 Mode possible values
|
||||
*/
|
||||
typedef enum { UART3_LIN_MODE_MASTER = (uint8_t)0x00, /**< LIN Master Mode*/
|
||||
UART3_LIN_MODE_SLAVE = (uint8_t)0x01 /**< LIN Slave Mode*/
|
||||
} UART3_LinMode_TypeDef;
|
||||
/**
|
||||
* @brief UART3 automatic resynchronisation possible values
|
||||
*/
|
||||
typedef enum { UART3_LIN_AUTOSYNC_DISABLE = (uint8_t)0x00, /**< LIN Autosynchronization Disable*/
|
||||
UART3_LIN_AUTOSYNC_ENABLE = (uint8_t)0x01 /**< LIN Autosynchronization Enable*/
|
||||
} UART3_LinAutosync_TypeDef;
|
||||
/**
|
||||
* @brief UART3 Divider Update Method possible values
|
||||
*/
|
||||
typedef enum { UART3_LIN_DIVUP_LBRR1 = (uint8_t)0x00, /**< LIN LDIV is updated as soon as LBRR1 is written*/
|
||||
UART3_LIN_DIVUP_NEXTRXNE = (uint8_t)0x01 /**< LIN LDIV is updated at the next received character*/
|
||||
} UART3_LinDivUp_TypeDef;
|
||||
|
||||
|
||||
/**
|
||||
* @brief UART3 Flag possible values
|
||||
*/
|
||||
typedef enum
|
||||
{
|
||||
UART3_FLAG_TXE = (uint16_t)0x0080, /*!< Transmit Data Register Empty flag */
|
||||
UART3_FLAG_TC = (uint16_t)0x0040, /*!< Transmission Complete flag */
|
||||
UART3_FLAG_RXNE = (uint16_t)0x0020, /*!< Read Data Register Not Empty flag */
|
||||
UART3_FLAG_IDLE = (uint16_t)0x0010, /*!< Idle line detected flag */
|
||||
UART3_FLAG_OR_LHE = (uint16_t)0x0008, /*!< OverRun error flag */
|
||||
UART3_FLAG_NF = (uint16_t)0x0004, /*!< Noise error flag */
|
||||
UART3_FLAG_FE = (uint16_t)0x0002, /*!< Framing Error flag */
|
||||
UART3_FLAG_PE = (uint16_t)0x0001, /*!< Parity Error flag */
|
||||
UART3_FLAG_SBK = (uint16_t)0x0101, /**< Send Break Complete interrupt flag */
|
||||
UART3_FLAG_LBDF = (uint16_t)0x0210, /**< LIN Break Detection Flag */
|
||||
UART3_FLAG_LHDF = (uint16_t)0x0302, /**< LIN Header Detection Flag*/
|
||||
UART3_FLAG_LSF = (uint16_t)0x0301 /**< LIN Sync Field Flag*/
|
||||
} UART3_Flag_TypeDef;
|
||||
|
||||
/**
|
||||
* @brief UART3 Interrupt definition
|
||||
* UART3_IT possible values
|
||||
* Elements values convention: 0xZYX
|
||||
* X: Position of the corresponding Interrupt
|
||||
* - For the following values, X means the interrupt position in the CR2 register.
|
||||
* UART3_IT_TXE
|
||||
* UART3_IT_TC
|
||||
* UART3_IT_RXNE
|
||||
* UART3_IT_IDLE
|
||||
* UART3_IT_OR
|
||||
* - For the UART3_IT_PE value, X means the flag position in the CR1 register.
|
||||
* - For the UART3_IT_LBDF value, X means the flag position in the CR4 register.
|
||||
* - For the UART3_IT_LHDF value, X means the flag position in the CR6 register.
|
||||
* Y: Flag position
|
||||
* - For the following values, Y means the flag (pending bit) position in the SR register.
|
||||
* UART3_IT_TXE
|
||||
* UART3_IT_TC
|
||||
* UART3_IT_RXNE
|
||||
* UART3_IT_IDLE
|
||||
* UART3_IT_OR
|
||||
* UART3_IT_PE
|
||||
* - For the UART3_IT_LBDF value, Y means the flag position in the CR4 register.
|
||||
* - For the UART3_IT_LHDF value, Y means the flag position in the CR6 register.
|
||||
* Z: Register index: indicate in which register the dedicated interrupt source is:
|
||||
* - 1==> CR1 register
|
||||
* - 2==> CR2 register
|
||||
* - 3==> CR4 register
|
||||
* - 4==> CR6 register
|
||||
*/
|
||||
typedef enum { UART3_IT_TXE = (uint16_t)0x0277, /**< Transmit interrupt */
|
||||
UART3_IT_TC = (uint16_t)0x0266, /**< Transmission Complete interrupt */
|
||||
UART3_IT_RXNE = (uint16_t)0x0255, /**< Data Register Not Empty interrupt */
|
||||
UART3_IT_IDLE = (uint16_t)0x0244, /**< Idle line detected interrupt */
|
||||
UART3_IT_OR = (uint16_t)0x0235, /**< OverRun error interrupt */
|
||||
UART3_IT_PE = (uint16_t)0x0100, /**< Parity Error interrupt */
|
||||
UART3_IT_LBDF = (uint16_t)0x0346, /**< LIN Break Detection interrupt */
|
||||
UART3_IT_LHDF = (uint16_t)0x0412, /**< LIN Header Detection interrupt*/
|
||||
UART3_IT_RXNE_OR = (uint16_t)0x0205 /*!< Receive/Overrun interrupt */
|
||||
} UART3_IT_TypeDef;
|
||||
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/* Exported constants --------------------------------------------------------*/
|
||||
/* Exported macros ------------------------------------------------------------*/
|
||||
|
||||
/* Private macros ------------------------------------------------------------*/
|
||||
|
||||
/** @addtogroup UART3_Private_Macros
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @brief Macro used by the assert_param function in order to check the
|
||||
* different sensitivity values for the FLAGs
|
||||
*/
|
||||
#define IS_UART3_FLAG_OK(Flag) \
|
||||
(((Flag) == UART3_FLAG_TXE) || \
|
||||
((Flag) == UART3_FLAG_TC) || \
|
||||
((Flag) == UART3_FLAG_RXNE) || \
|
||||
((Flag) == UART3_FLAG_IDLE) || \
|
||||
((Flag) == UART3_FLAG_OR_LHE) || \
|
||||
((Flag) == UART3_FLAG_NF) || \
|
||||
((Flag) == UART3_FLAG_FE) || \
|
||||
((Flag) == UART3_FLAG_PE) || \
|
||||
((Flag) == UART3_FLAG_SBK) || \
|
||||
((Flag) == UART3_FLAG_LSF) || \
|
||||
((Flag) == UART3_FLAG_LHDF) || \
|
||||
((Flag) == UART3_FLAG_LBDF))
|
||||
|
||||
|
||||
/**
|
||||
* @brief Macro used by the assert_param function in order to check the
|
||||
* different sensitivity values for the FLAGs that can be cleared by writing 0
|
||||
*/
|
||||
#define IS_UART3_CLEAR_FLAG_OK(Flag) \
|
||||
(((Flag) == UART3_FLAG_RXNE) || \
|
||||
((Flag) == UART3_FLAG_LHDF) || \
|
||||
((Flag) == UART3_FLAG_LSF) || \
|
||||
((Flag) == UART3_FLAG_LBDF))
|
||||
|
||||
/**
|
||||
* @brief Macro used by the assert_param function in order to check the
|
||||
* different sensitivity values for the Interrupts
|
||||
*/
|
||||
|
||||
#define IS_UART3_CONFIG_IT_OK(Interrupt) \
|
||||
(((Interrupt) == UART3_IT_PE) || \
|
||||
((Interrupt) == UART3_IT_TXE) || \
|
||||
((Interrupt) == UART3_IT_TC) || \
|
||||
((Interrupt) == UART3_IT_RXNE_OR ) || \
|
||||
((Interrupt) == UART3_IT_IDLE) || \
|
||||
((Interrupt) == UART3_IT_LHDF) || \
|
||||
((Interrupt) == UART3_IT_LBDF))
|
||||
|
||||
/**
|
||||
* @brief Macro used by the assert function in order to check the different
|
||||
* sensitivity values for the pending bit
|
||||
*/
|
||||
#define IS_UART3_GET_IT_OK(ITPendingBit) \
|
||||
(((ITPendingBit) == UART3_IT_TXE) || \
|
||||
((ITPendingBit) == UART3_IT_TC) || \
|
||||
((ITPendingBit) == UART3_IT_RXNE) || \
|
||||
((ITPendingBit) == UART3_IT_IDLE) || \
|
||||
((ITPendingBit) == UART3_IT_OR) || \
|
||||
((ITPendingBit) == UART3_IT_LBDF) || \
|
||||
((ITPendingBit) == UART3_IT_LHDF) || \
|
||||
((ITPendingBit) == UART3_IT_PE))
|
||||
|
||||
/**
|
||||
* @brief Macro used by the assert function in order to check the different
|
||||
* sensitivity values for the pending bit that can be cleared by writing 0
|
||||
*/
|
||||
#define IS_UART3_CLEAR_IT_OK(ITPendingBit) \
|
||||
(((ITPendingBit) == UART3_IT_RXNE) || \
|
||||
((ITPendingBit) == UART3_IT_LHDF) || \
|
||||
((ITPendingBit) == UART3_IT_LBDF))
|
||||
|
||||
/**
|
||||
* @brief Macro used by the assert_param function in order to check the different
|
||||
* sensitivity values for the MODEs
|
||||
*/
|
||||
#define IS_UART3_MODE_OK(Mode) \
|
||||
(((Mode) == (uint8_t)UART3_MODE_RX_ENABLE) || \
|
||||
((Mode) == (uint8_t)UART3_MODE_RX_DISABLE) || \
|
||||
((Mode) == (uint8_t)UART3_MODE_TX_ENABLE) || \
|
||||
((Mode) == (uint8_t)UART3_MODE_TX_DISABLE) || \
|
||||
((Mode) == (uint8_t)UART3_MODE_TXRX_ENABLE) || \
|
||||
((Mode) == (uint8_t)((uint8_t)UART3_MODE_TX_ENABLE|(uint8_t)UART3_MODE_RX_ENABLE)) || \
|
||||
((Mode) == (uint8_t)((uint8_t)UART3_MODE_TX_ENABLE|(uint8_t)UART3_MODE_RX_DISABLE)) || \
|
||||
((Mode) == (uint8_t)((uint8_t)UART3_MODE_TX_DISABLE|(uint8_t)UART3_MODE_RX_DISABLE)) || \
|
||||
((Mode) == (uint8_t)((uint8_t)UART3_MODE_TX_DISABLE|(uint8_t)UART3_MODE_RX_ENABLE)))
|
||||
|
||||
/**
|
||||
* @brief Macro used by the assert_param function in order to check the different
|
||||
* sensitivity values for the WordLengths
|
||||
*/
|
||||
#define IS_UART3_WORDLENGTH_OK(WordLength) \
|
||||
(((WordLength) == UART3_WORDLENGTH_8D) || \
|
||||
((WordLength) == UART3_WORDLENGTH_9D))
|
||||
|
||||
|
||||
/**
|
||||
* @brief Macro used by the assert_param function in order to check the different
|
||||
* sensitivity values for the WakeUps
|
||||
*/
|
||||
#define IS_UART3_WAKEUP_OK(WakeUpMode) \
|
||||
(((WakeUpMode) == UART3_WAKEUP_IDLELINE) || \
|
||||
((WakeUpMode) == UART3_WAKEUP_ADDRESSMARK))
|
||||
|
||||
/**
|
||||
* @brief Macro used by the assert_param function in order to check the different
|
||||
* sensitivity values for the LINBreakDetectionLengths
|
||||
*/
|
||||
#define IS_UART3_LINBREAKDETECTIONLENGTH_OK(LINBreakDetectionLengths) \
|
||||
(((LINBreakDetectionLengths) == UART3_LINBREAKDETECTIONLENGTH_10BITS) || \
|
||||
((LINBreakDetectionLengths) == UART3_LINBREAKDETECTIONLENGTH_11BITS))
|
||||
|
||||
/**
|
||||
* @brief Macro used by the assert_param function in order to check the different
|
||||
* sensitivity values for the UART3_StopBits
|
||||
*/
|
||||
#define IS_UART3_STOPBITS_OK(StopBit) \
|
||||
(((StopBit) == UART3_STOPBITS_1) || \
|
||||
((StopBit) == UART3_STOPBITS_2))
|
||||
|
||||
/**
|
||||
* @brief Macro used by the assert_param function in order to check the different
|
||||
* sensitivity values for the Parity
|
||||
*/
|
||||
#define IS_UART3_PARITY_OK(Parity) \
|
||||
(((Parity) == UART3_PARITY_NO) || \
|
||||
((Parity) == UART3_PARITY_EVEN) || \
|
||||
((Parity) == UART3_PARITY_ODD ))
|
||||
|
||||
/**
|
||||
* @brief Macro used by the assert_param function in order to check the maximum
|
||||
* baudrate value
|
||||
*/
|
||||
#define IS_UART3_BAUDRATE_OK(NUM) ((NUM) <= (uint32_t)625000)
|
||||
|
||||
/**
|
||||
* @brief Macro used by the assert_param function in order to check the address
|
||||
* of the UART3 or UART node
|
||||
*/
|
||||
#define UART3_ADDRESS_MAX ((uint8_t)16)
|
||||
#define IS_UART3_ADDRESS_OK(Node) ((Node) < UART3_ADDRESS_MAX)
|
||||
|
||||
/**
|
||||
* @brief Macro used by the assert_param function in order to check the LIN mode
|
||||
*/
|
||||
#define IS_UART3_SLAVE_OK(Mode) \
|
||||
(((Mode) == UART3_LIN_MODE_MASTER) || \
|
||||
((Mode) == UART3_LIN_MODE_SLAVE))
|
||||
|
||||
/**
|
||||
* @brief Macro used by the assert_param function in order to check the LIN
|
||||
* automatic resynchronization mode
|
||||
*/
|
||||
#define IS_UART3_AUTOSYNC_OK(AutosyncMode) \
|
||||
(((AutosyncMode) == UART3_LIN_AUTOSYNC_ENABLE) || \
|
||||
((AutosyncMode) == UART3_LIN_AUTOSYNC_DISABLE))
|
||||
|
||||
/**
|
||||
* @brief Macro used by the assert_param function in order to check the LIN
|
||||
* divider update method
|
||||
*/
|
||||
#define IS_UART3_DIVUP_OK(DivupMethod) \
|
||||
(((DivupMethod) == UART3_LIN_DIVUP_LBRR1) || \
|
||||
((DivupMethod) == UART3_LIN_DIVUP_NEXTRXNE))
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/* Exported functions ------------------------------------------------------- */
|
||||
|
||||
/** @addtogroup UART3_Exported_Functions
|
||||
* @{
|
||||
*/
|
||||
|
||||
void UART3_DeInit(void);
|
||||
void UART3_Init(uint32_t BaudRate, UART3_WordLength_TypeDef WordLength,
|
||||
UART3_StopBits_TypeDef StopBits, UART3_Parity_TypeDef Parity,
|
||||
UART3_Mode_TypeDef Mode);
|
||||
void UART3_Cmd(FunctionalState NewState);
|
||||
void UART3_ITConfig(UART3_IT_TypeDef UART3_IT, FunctionalState NewState);
|
||||
void UART3_LINBreakDetectionConfig(UART3_LINBreakDetectionLength_TypeDef UART3_LINBreakDetectionLength);
|
||||
void UART3_LINConfig(UART3_LinMode_TypeDef UART3_Mode,
|
||||
UART3_LinAutosync_TypeDef UART3_Autosync,
|
||||
UART3_LinDivUp_TypeDef UART3_DivUp);
|
||||
void UART3_LINCmd(FunctionalState NewState);
|
||||
void UART3_ReceiverWakeUpCmd(FunctionalState NewState);
|
||||
void UART3_WakeUpConfig( UART3_WakeUp_TypeDef UART3_WakeUp);
|
||||
uint8_t UART3_ReceiveData8(void);
|
||||
uint16_t UART3_ReceiveData9(void);
|
||||
void UART3_SendData8(uint8_t Data);
|
||||
void UART3_SendData9(uint16_t Data);
|
||||
void UART3_SendBreak(void);
|
||||
void UART3_SetAddress(uint8_t UART3_Address);
|
||||
FlagStatus UART3_GetFlagStatus(UART3_Flag_TypeDef UART3_FLAG);
|
||||
void UART3_ClearFlag(UART3_Flag_TypeDef UART3_FLAG);
|
||||
ITStatus UART3_GetITStatus(UART3_IT_TypeDef UART3_IT);
|
||||
void UART3_ClearITPendingBit(UART3_IT_TypeDef UART3_IT);
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
#endif /* __STM8S_UART3_H */
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
|
||||
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
|
||||
444
Serial/inc/stm8s_uart4.h
Normal file
444
Serial/inc/stm8s_uart4.h
Normal file
@@ -0,0 +1,444 @@
|
||||
/**
|
||||
********************************************************************************
|
||||
* @file stm8s_uart4.h
|
||||
* @author MCD Application Team
|
||||
* @version V2.3.0
|
||||
* @date 16-June-2017
|
||||
* @brief This file contains all functions prototypes and macros for the UART4 peripheral.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© COPYRIGHT 2014 STMicroelectronics</center></h2>
|
||||
*
|
||||
* Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
|
||||
* You may not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at:
|
||||
*
|
||||
* http://www.st.com/software_license_agreement_liberty_v2
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an "AS IS" BASIS,
|
||||
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
/* Define to prevent recursive inclusion -------------------------------------*/
|
||||
#ifndef __STM8S_UART4_H
|
||||
#define __STM8S_UART4_H
|
||||
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
#include "stm8s.h"
|
||||
|
||||
/** @addtogroup STM8S_StdPeriph_Driver
|
||||
* @{
|
||||
*/
|
||||
|
||||
/* Exported types ------------------------------------------------------------*/
|
||||
|
||||
/** @addtogroup UART4_Exported_Types
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @brief UART4 Irda Modes
|
||||
*/
|
||||
|
||||
typedef enum { UART4_IRDAMODE_NORMAL = (uint8_t)0x00, /**< 0x00 Irda Normal Mode */
|
||||
UART4_IRDAMODE_LOWPOWER = (uint8_t)0x01 /**< 0x01 Irda Low Power Mode */
|
||||
|
||||
} UART4_IrDAMode_TypeDef;
|
||||
|
||||
/**
|
||||
* @brief UART4 WakeUP Modes
|
||||
*/
|
||||
|
||||
typedef enum { UART4_WAKEUP_IDLELINE = (uint8_t)0x00, /**< 0x01 Idle Line wake up */
|
||||
UART4_WAKEUP_ADDRESSMARK = (uint8_t)0x08 /**< 0x02 Address Mark wake up */
|
||||
} UART4_WakeUp_TypeDef;
|
||||
|
||||
|
||||
/**
|
||||
* @brief UART4 LIN Break detection length possible values
|
||||
*/
|
||||
typedef enum { UART4_LINBREAKDETECTIONLENGTH_10BITS = (uint8_t)0x00, /**< 0x01 10 bits Lin Break detection */
|
||||
UART4_LINBREAKDETECTIONLENGTH_11BITS = (uint8_t)0x01 /**< 0x02 11 bits Lin Break detection */
|
||||
} UART4_LINBreakDetectionLength_TypeDef;
|
||||
|
||||
/**
|
||||
* @brief UART4 stop bits possible values
|
||||
*/
|
||||
|
||||
typedef enum { UART4_STOPBITS_1 = (uint8_t)0x00, /**< One stop bit is transmitted at the end of frame*/
|
||||
UART4_STOPBITS_0_5 = (uint8_t)0x10, /**< Half stop bits is transmitted at the end of frame*/
|
||||
UART4_STOPBITS_2 = (uint8_t)0x20, /**< Two stop bits are transmitted at the end of frame*/
|
||||
UART4_STOPBITS_1_5 = (uint8_t)0x30 /**< One and half stop bits*/
|
||||
} UART4_StopBits_TypeDef;
|
||||
|
||||
|
||||
/**
|
||||
* @brief UART4 parity possible values
|
||||
*/
|
||||
typedef enum { UART4_PARITY_NO = (uint8_t)0x00, /**< No Parity*/
|
||||
UART4_PARITY_EVEN = (uint8_t)0x04, /**< Even Parity*/
|
||||
UART4_PARITY_ODD = (uint8_t)0x06 /**< Odd Parity*/
|
||||
} UART4_Parity_TypeDef;
|
||||
/**
|
||||
* @brief UART4 Mode possible values
|
||||
*/
|
||||
typedef enum { UART4_LIN_MODE_MASTER = (uint8_t)0x00, /**< LIN Master Mode*/
|
||||
UART4_LIN_MODE_SLAVE = (uint8_t)0x01 /**< LIN Slave Mode*/
|
||||
} UART4_LinMode_TypeDef;
|
||||
/**
|
||||
* @brief UART4 automatic resynchronisation possible values
|
||||
*/
|
||||
typedef enum { UART4_LIN_AUTOSYNC_DISABLE = (uint8_t)0x00, /**< LIN Autosynchronization Disable*/
|
||||
UART4_LIN_AUTOSYNC_ENABLE = (uint8_t)0x01 /**< LIN Autosynchronization Enable*/
|
||||
} UART4_LinAutosync_TypeDef;
|
||||
/**
|
||||
* @brief UART4 Divider Update Method possible values
|
||||
*/
|
||||
typedef enum { UART4_LIN_DIVUP_LBRR1 = (uint8_t)0x00, /**< LIN LDIV is updated as soon as LBRR1 is written*/
|
||||
UART4_LIN_DIVUP_NEXTRXNE = (uint8_t)0x01 /**< LIN LDIV is updated at the next received character*/
|
||||
} UART4_LinDivUp_TypeDef;
|
||||
|
||||
/**
|
||||
* @brief UART4 Synchrone modes
|
||||
*/
|
||||
typedef enum { UART4_SYNCMODE_CLOCK_DISABLE = (uint8_t)0x80, /**< 0x80 Sync mode Disable, SLK pin Disable */
|
||||
UART4_SYNCMODE_CLOCK_ENABLE = (uint8_t)0x08, /**< 0x08 Sync mode Enable, SLK pin Enable */
|
||||
UART4_SYNCMODE_CPOL_LOW = (uint8_t)0x40, /**< 0x40 Steady low value on SCLK pin outside transmission window */
|
||||
UART4_SYNCMODE_CPOL_HIGH = (uint8_t)0x04, /**< 0x04 Steady high value on SCLK pin outside transmission window */
|
||||
UART4_SYNCMODE_CPHA_MIDDLE = (uint8_t)0x20, /**< 0x20 SCLK clock line activated in middle of data bit */
|
||||
UART4_SYNCMODE_CPHA_BEGINING = (uint8_t)0x02, /**< 0x02 SCLK clock line activated at beginning of data bit */
|
||||
UART4_SYNCMODE_LASTBIT_DISABLE = (uint8_t)0x10, /**< 0x10 The clock pulse of the last data bit is not output to the SCLK pin */
|
||||
UART4_SYNCMODE_LASTBIT_ENABLE = (uint8_t)0x01 /**< 0x01 The clock pulse of the last data bit is output to the SCLK pin */
|
||||
} UART4_SyncMode_TypeDef;
|
||||
|
||||
/**
|
||||
* @brief UART4 Word length possible values
|
||||
*/
|
||||
typedef enum { UART4_WORDLENGTH_8D = (uint8_t)0x00,/**< 0x00 8 bits Data */
|
||||
UART4_WORDLENGTH_9D = (uint8_t)0x10 /**< 0x10 9 bits Data */
|
||||
} UART4_WordLength_TypeDef;
|
||||
|
||||
/**
|
||||
* @brief UART4 Mode possible values
|
||||
*/
|
||||
typedef enum { UART4_MODE_RX_ENABLE = (uint8_t)0x08, /**< 0x08 Receive Enable */
|
||||
UART4_MODE_TX_ENABLE = (uint8_t)0x04, /**< 0x04 Transmit Enable */
|
||||
UART4_MODE_TX_DISABLE = (uint8_t)0x80, /**< 0x80 Transmit Disable */
|
||||
UART4_MODE_RX_DISABLE = (uint8_t)0x40, /**< 0x40 Single-wire Half-duplex mode */
|
||||
UART4_MODE_TXRX_ENABLE = (uint8_t)0x0C /**< 0x0C Transmit Enable and Receive Enable */
|
||||
} UART4_Mode_TypeDef;
|
||||
/**
|
||||
* @brief UART4 Flag possible values
|
||||
*/
|
||||
typedef enum
|
||||
{
|
||||
UART4_FLAG_TXE = (uint16_t)0x0080, /*!< Transmit Data Register Empty flag */
|
||||
UART4_FLAG_TC = (uint16_t)0x0040, /*!< Transmission Complete flag */
|
||||
UART4_FLAG_RXNE = (uint16_t)0x0020, /*!< Read Data Register Not Empty flag */
|
||||
UART4_FLAG_IDLE = (uint16_t)0x0010, /*!< Idle line detected flag */
|
||||
UART4_FLAG_OR_LHE = (uint16_t)0x0008, /*!< OverRun error flag */
|
||||
UART4_FLAG_NF = (uint16_t)0x0004, /*!< Noise error flag */
|
||||
UART4_FLAG_FE = (uint16_t)0x0002, /*!< Framing Error flag */
|
||||
UART4_FLAG_PE = (uint16_t)0x0001, /*!< Parity Error flag */
|
||||
UART4_FLAG_SBK = (uint16_t)0x0101, /**< Send Break Complete interrupt flag */
|
||||
UART4_FLAG_LBDF = (uint16_t)0x0210, /**< LIN Break Detection Flag */
|
||||
UART4_FLAG_LHDF = (uint16_t)0x0302, /**< LIN Header Detection Flag*/
|
||||
UART4_FLAG_LSF = (uint16_t)0x0301 /**< LIN Sync Field Flag*/
|
||||
} UART4_Flag_TypeDef;
|
||||
|
||||
/**
|
||||
* @brief UART4 Interrupt definition
|
||||
* UART4_IT possible values
|
||||
* Elements values convention: 0xZYX
|
||||
* X: Position of the corresponding Interrupt
|
||||
* - For the following values, X means the interrupt position in the CR2 register.
|
||||
* UART4_IT_TXE
|
||||
* UART4_IT_TC
|
||||
* UART4_IT_RXNE
|
||||
* UART4_IT_IDLE
|
||||
* UART4_IT_OR
|
||||
* - For the UART4_IT_PE value, X means the flag position in the CR1 register.
|
||||
* - For the UART4_IT_LBDF value, X means the flag position in the CR4 register.
|
||||
* - For the UART4_IT_LHDF value, X means the flag position in the CR6 register.
|
||||
* Y: Flag position
|
||||
* - For the following values, Y means the flag (pending bit) position in the SR register.
|
||||
* UART4_IT_TXE
|
||||
* UART4_IT_TC
|
||||
* UART4_IT_RXNE
|
||||
* UART4_IT_IDLE
|
||||
* UART4_IT_OR
|
||||
* UART4_IT_PE
|
||||
* - For the UART4_IT_LBDF value, Y means the flag position in the CR4 register.
|
||||
* - For the UART4_IT_LHDF value, Y means the flag position in the CR6 register.
|
||||
* Z: Register index: indicate in which register the dedicated interrupt source is:
|
||||
* - 1==> CR1 register
|
||||
* - 2==> CR2 register
|
||||
* - 3==> CR4 register
|
||||
* - 4==> CR6 register
|
||||
*/
|
||||
typedef enum { UART4_IT_TXE = (uint16_t)0x0277, /**< Transmit interrupt */
|
||||
UART4_IT_TC = (uint16_t)0x0266, /**< Transmission Complete interrupt */
|
||||
UART4_IT_RXNE = (uint16_t)0x0255, /**< Data Register Not Empty interrupt */
|
||||
UART4_IT_IDLE = (uint16_t)0x0244, /**< Idle line detected interrupt */
|
||||
UART4_IT_OR = (uint16_t)0x0235, /**< OverRun error interrupt */
|
||||
UART4_IT_PE = (uint16_t)0x0100, /**< Parity Error interrupt */
|
||||
UART4_IT_LBDF = (uint16_t)0x0346, /**< LIN Break Detection interrupt */
|
||||
UART4_IT_LHDF = (uint16_t)0x0412, /**< LIN Header Detection interrupt*/
|
||||
UART4_IT_RXNE_OR = (uint16_t)0x0205 /*!< Receive/Overrun interrupt */
|
||||
} UART4_IT_TypeDef;
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/* Exported constants --------------------------------------------------------*/
|
||||
/* Exported macros -----------------------------------------------------------*/
|
||||
/* Private macros ------------------------------------------------------------*/
|
||||
|
||||
/** @addtogroup UART4_Private_Macros
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @brief Macro used by the assert function to check the different functions parameters.
|
||||
*/
|
||||
|
||||
/**
|
||||
* @brief Macro used by the assert_param function in order to check the different
|
||||
* sensitivity values for the MODEs possible combination should be one of
|
||||
* the following.
|
||||
*/
|
||||
|
||||
#define IS_UART4_MODE_OK(Mode) \
|
||||
(((Mode) == (uint8_t)UART4_MODE_RX_ENABLE) || \
|
||||
((Mode) == (uint8_t)UART4_MODE_RX_DISABLE) || \
|
||||
((Mode) == (uint8_t)UART4_MODE_TX_ENABLE) || \
|
||||
((Mode) == (uint8_t)UART4_MODE_TX_DISABLE) || \
|
||||
((Mode) == (uint8_t)UART4_MODE_TXRX_ENABLE) || \
|
||||
((Mode) == (uint8_t)((uint8_t)UART4_MODE_TX_ENABLE|(uint8_t)UART4_MODE_RX_ENABLE)) || \
|
||||
((Mode) == (uint8_t)((uint8_t)UART4_MODE_TX_ENABLE|(uint8_t)UART4_MODE_RX_DISABLE)) || \
|
||||
((Mode) == (uint8_t)((uint8_t)UART4_MODE_TX_DISABLE|(uint8_t)UART4_MODE_RX_DISABLE)) || \
|
||||
((Mode) == (uint8_t)((uint8_t)UART4_MODE_TX_DISABLE|(uint8_t)UART4_MODE_RX_ENABLE)))
|
||||
|
||||
/**
|
||||
* @brief Macro used by the assert_param function in order to check the different
|
||||
* sensitivity values for the WordLengths
|
||||
*/
|
||||
#define IS_UART4_WORDLENGTH_OK(WordLength) \
|
||||
(((WordLength) == UART4_WORDLENGTH_8D) || \
|
||||
((WordLength) == UART4_WORDLENGTH_9D))
|
||||
|
||||
/**
|
||||
* @brief Macro used by the assert_param function in order to check the different
|
||||
* sensitivity values for the SyncModes; it should exclude values such
|
||||
* as UART4_CLOCK_ENABLE|UART4_CLOCK_DISABLE
|
||||
*/
|
||||
#define IS_UART4_SYNCMODE_OK(SyncMode) \
|
||||
(!((((SyncMode)&(((uint8_t)UART4_SYNCMODE_CLOCK_ENABLE)|((uint8_t)UART4_SYNCMODE_CLOCK_DISABLE))) == (((uint8_t)UART4_SYNCMODE_CLOCK_ENABLE)|((uint8_t)UART4_SYNCMODE_CLOCK_DISABLE))) || \
|
||||
(((SyncMode)&(((uint8_t)UART4_SYNCMODE_CPOL_LOW )|((uint8_t)UART4_SYNCMODE_CPOL_HIGH))) == (((uint8_t)UART4_SYNCMODE_CPOL_LOW )|((uint8_t)UART4_SYNCMODE_CPOL_HIGH))) || \
|
||||
(((SyncMode)&(((uint8_t)UART4_SYNCMODE_CPHA_MIDDLE)|((uint8_t)UART4_SYNCMODE_CPHA_BEGINING))) == (((uint8_t)UART4_SYNCMODE_CPHA_MIDDLE)|((uint8_t)UART4_SYNCMODE_CPHA_BEGINING))) || \
|
||||
(((SyncMode)&(((uint8_t)UART4_SYNCMODE_LASTBIT_DISABLE)|((uint8_t)UART4_SYNCMODE_LASTBIT_ENABLE))) == (((uint8_t)UART4_SYNCMODE_LASTBIT_DISABLE)|((uint8_t)UART4_SYNCMODE_LASTBIT_ENABLE)))))
|
||||
|
||||
/**
|
||||
* @brief Macro used by the assert_param function in order to check the
|
||||
* different sensitivity values for the FLAGs
|
||||
*/
|
||||
#define IS_UART4_FLAG_OK(Flag) \
|
||||
(((Flag) == UART4_FLAG_TXE) || \
|
||||
((Flag) == UART4_FLAG_TC) || \
|
||||
((Flag) == UART4_FLAG_RXNE) || \
|
||||
((Flag) == UART4_FLAG_IDLE) || \
|
||||
((Flag) == UART4_FLAG_OR_LHE) || \
|
||||
((Flag) == UART4_FLAG_NF) || \
|
||||
((Flag) == UART4_FLAG_FE) || \
|
||||
((Flag) == UART4_FLAG_PE) || \
|
||||
((Flag) == UART4_FLAG_SBK) || \
|
||||
((Flag) == UART4_FLAG_LSF) || \
|
||||
((Flag) == UART4_FLAG_LHDF) || \
|
||||
((Flag) == UART4_FLAG_LBDF))
|
||||
|
||||
|
||||
/**
|
||||
* @brief Macro used by the assert_param function in order to check the
|
||||
* different sensitivity values for the FLAGs that can be cleared by writing 0
|
||||
*/
|
||||
#define IS_UART4_CLEAR_FLAG_OK(Flag) \
|
||||
(((Flag) == UART4_FLAG_RXNE) || \
|
||||
((Flag) == UART4_FLAG_LHDF) || \
|
||||
((Flag) == UART4_FLAG_LSF) || \
|
||||
((Flag) == UART4_FLAG_LBDF))
|
||||
|
||||
/**
|
||||
* @brief Macro used by the assert_param function in order to check
|
||||
* the different sensitivity values for the Interrupts
|
||||
*/
|
||||
|
||||
#define IS_UART4_CONFIG_IT_OK(Interrupt) \
|
||||
(((Interrupt) == UART4_IT_PE) || \
|
||||
((Interrupt) == UART4_IT_TXE) || \
|
||||
((Interrupt) == UART4_IT_TC) || \
|
||||
((Interrupt) == UART4_IT_RXNE_OR ) || \
|
||||
((Interrupt) == UART4_IT_IDLE) || \
|
||||
((Interrupt) == UART4_IT_LHDF) || \
|
||||
((Interrupt) == UART4_IT_LBDF))
|
||||
|
||||
/**
|
||||
* @brief Macro used by the assert function in order to check the different
|
||||
* sensitivity values for the pending bit
|
||||
*/
|
||||
#define IS_UART4_GET_IT_OK(ITPendingBit) \
|
||||
(((ITPendingBit) == UART4_IT_TXE) || \
|
||||
((ITPendingBit) == UART4_IT_TC) || \
|
||||
((ITPendingBit) == UART4_IT_RXNE) || \
|
||||
((ITPendingBit) == UART4_IT_IDLE) || \
|
||||
((ITPendingBit) == UART4_IT_OR) || \
|
||||
((ITPendingBit) == UART4_IT_LBDF) || \
|
||||
((ITPendingBit) == UART4_IT_LHDF) || \
|
||||
((ITPendingBit) == UART4_IT_PE))
|
||||
|
||||
/**
|
||||
* @brief Macro used by the assert function in order to check the different
|
||||
* sensitivity values for the pending bit that can be cleared by writing 0
|
||||
*/
|
||||
#define IS_UART4_CLEAR_IT_OK(ITPendingBit) \
|
||||
(((ITPendingBit) == UART4_IT_RXNE) || \
|
||||
((ITPendingBit) == UART4_IT_LHDF) || \
|
||||
((ITPendingBit) == UART4_IT_LBDF))
|
||||
|
||||
|
||||
/**
|
||||
* @brief Macro used by the assert_param function in order to check the different
|
||||
* sensitivity values for the IrDAModes
|
||||
*/
|
||||
#define IS_UART4_IRDAMODE_OK(IrDAMode) \
|
||||
(((IrDAMode) == UART4_IRDAMODE_LOWPOWER) || \
|
||||
((IrDAMode) == UART4_IRDAMODE_NORMAL))
|
||||
|
||||
/**
|
||||
* @brief Macro used by the assert_param function in order to check the different
|
||||
* sensitivity values for the WakeUps
|
||||
*/
|
||||
#define IS_UART4_WAKEUP_OK(WakeUp) \
|
||||
(((WakeUp) == UART4_WAKEUP_IDLELINE) || \
|
||||
((WakeUp) == UART4_WAKEUP_ADDRESSMARK))
|
||||
|
||||
/**
|
||||
* @brief Macro used by the assert_param function in order to check the different
|
||||
* sensitivity values for the LINBreakDetectionLengths
|
||||
*/
|
||||
#define IS_UART4_LINBREAKDETECTIONLENGTH_OK(LINBreakDetectionLength) \
|
||||
(((LINBreakDetectionLength) == UART4_LINBREAKDETECTIONLENGTH_10BITS) || \
|
||||
((LINBreakDetectionLength) == UART4_LINBREAKDETECTIONLENGTH_11BITS))
|
||||
|
||||
/**
|
||||
* @brief Macro used by the assert_param function in order to check the different
|
||||
* sensitivity values for the UART4_StopBits
|
||||
*/
|
||||
#define IS_UART4_STOPBITS_OK(StopBit) (((StopBit) == UART4_STOPBITS_1) || \
|
||||
((StopBit) == UART4_STOPBITS_0_5) || \
|
||||
((StopBit) == UART4_STOPBITS_2) || \
|
||||
((StopBit) == UART4_STOPBITS_1_5 ))
|
||||
|
||||
/**
|
||||
* @brief Macro used by the assert_param function in order to check the different
|
||||
* sensitivity values for the Paritys
|
||||
*/
|
||||
#define IS_UART4_PARITY_OK(Parity) (((Parity) == UART4_PARITY_NO) || \
|
||||
((Parity) == UART4_PARITY_EVEN) || \
|
||||
((Parity) == UART4_PARITY_ODD ))
|
||||
|
||||
/**
|
||||
* @brief Macro used by the assert_param function in order to check the maximum
|
||||
* baudrate value
|
||||
*/
|
||||
#define IS_UART4_BAUDRATE_OK(NUM) ((NUM) <= (uint32_t)625000)
|
||||
|
||||
/**
|
||||
* @brief Macro used by the assert_param function in order to check the address
|
||||
* of the UART4 or UART node
|
||||
*/
|
||||
#define UART4_ADDRESS_MAX ((uint8_t)16)
|
||||
#define IS_UART4_ADDRESS_OK(node) ((node) < UART4_ADDRESS_MAX )
|
||||
|
||||
/**
|
||||
* @brief Macro used by the assert_param function in order to check the LIN mode
|
||||
*/
|
||||
#define IS_UART4_SLAVE_OK(Mode) \
|
||||
(((Mode) == UART4_LIN_MODE_MASTER) || \
|
||||
((Mode) == UART4_LIN_MODE_SLAVE))
|
||||
|
||||
/**
|
||||
* @brief Macro used by the assert_param function in order to check the LIN
|
||||
* automatic resynchronization mode
|
||||
*/
|
||||
#define IS_UART4_AUTOSYNC_OK(AutosyncMode) \
|
||||
(((AutosyncMode) == UART4_LIN_AUTOSYNC_ENABLE) || \
|
||||
((AutosyncMode) == UART4_LIN_AUTOSYNC_DISABLE))
|
||||
|
||||
/**
|
||||
* @brief Macro used by the assert_param function in order to check the LIN divider update method
|
||||
*/
|
||||
#define IS_UART4_DIVUP_OK(DivupMethod) \
|
||||
(((DivupMethod) == UART4_LIN_DIVUP_LBRR1) || \
|
||||
((DivupMethod) == UART4_LIN_DIVUP_NEXTRXNE))
|
||||
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/* Exported functions ------------------------------------------------------- */
|
||||
|
||||
/** @addtogroup UART4_Exported_Functions
|
||||
* @{
|
||||
*/
|
||||
void UART4_DeInit(void);
|
||||
void UART4_Init(uint32_t BaudRate, UART4_WordLength_TypeDef WordLength,
|
||||
UART4_StopBits_TypeDef StopBits, UART4_Parity_TypeDef Parity,
|
||||
UART4_SyncMode_TypeDef SyncMode, UART4_Mode_TypeDef Mode);
|
||||
void UART4_Cmd(FunctionalState NewState);
|
||||
void UART4_ITConfig(UART4_IT_TypeDef UART4_IT, FunctionalState NewState);
|
||||
void UART4_HalfDuplexCmd(FunctionalState NewState);
|
||||
void UART4_IrDAConfig(UART4_IrDAMode_TypeDef UART4_IrDAMode);
|
||||
void UART4_IrDACmd(FunctionalState NewState);
|
||||
void UART4_LINBreakDetectionConfig(UART4_LINBreakDetectionLength_TypeDef UART4_LINBreakDetectionLength);
|
||||
void UART4_LINConfig(UART4_LinMode_TypeDef UART4_Mode,
|
||||
UART4_LinAutosync_TypeDef UART4_Autosync,
|
||||
UART4_LinDivUp_TypeDef UART4_DivUp);
|
||||
void UART4_LINCmd(FunctionalState NewState);
|
||||
void UART4_SmartCardCmd(FunctionalState NewState);
|
||||
void UART4_SmartCardNACKCmd(FunctionalState NewState);
|
||||
void UART4_WakeUpConfig(UART4_WakeUp_TypeDef UART4_WakeUp);
|
||||
void UART4_ReceiverWakeUpCmd(FunctionalState NewState);
|
||||
uint8_t UART4_ReceiveData8(void);
|
||||
uint16_t UART4_ReceiveData9(void);
|
||||
void UART4_SendData8(uint8_t Data);
|
||||
void UART4_SendData9(uint16_t Data);
|
||||
void UART4_SendBreak(void);
|
||||
void UART4_SetAddress(uint8_t UART4_Address);
|
||||
void UART4_SetGuardTime(uint8_t UART4_GuardTime);
|
||||
void UART4_SetPrescaler(uint8_t UART4_Prescaler);
|
||||
FlagStatus UART4_GetFlagStatus(UART4_Flag_TypeDef UART4_FLAG);
|
||||
void UART4_ClearFlag(UART4_Flag_TypeDef UART4_FLAG);
|
||||
ITStatus UART4_GetITStatus(UART4_IT_TypeDef UART4_IT);
|
||||
void UART4_ClearITPendingBit(UART4_IT_TypeDef UART4_IT);
|
||||
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
#endif /* __STM8S_UART4_H */
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
|
||||
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
|
||||
87
Serial/inc/stm8s_wwdg.h
Normal file
87
Serial/inc/stm8s_wwdg.h
Normal file
@@ -0,0 +1,87 @@
|
||||
/**
|
||||
********************************************************************************
|
||||
* @file stm8s_wwdg.h
|
||||
* @author MCD Application Team
|
||||
* @version V2.3.0
|
||||
* @date 16-June-2017
|
||||
* @brief This file contains all functions prototype and macros for the WWDG peripheral.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© COPYRIGHT 2014 STMicroelectronics</center></h2>
|
||||
*
|
||||
* Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
|
||||
* You may not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at:
|
||||
*
|
||||
* http://www.st.com/software_license_agreement_liberty_v2
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an "AS IS" BASIS,
|
||||
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
/* Define to prevent recursive inclusion -------------------------------------*/
|
||||
#ifndef __STM8S_WWDG_H
|
||||
#define __STM8S_WWDG_H
|
||||
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
#include "stm8s.h"
|
||||
|
||||
/** @addtogroup STM8S_StdPeriph_Driver
|
||||
* @{
|
||||
*/
|
||||
|
||||
/* Private macros ------------------------------------------------------------*/
|
||||
|
||||
/** @addtogroup WWDG_Private_Macros
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @brief Macro used by the assert function in order to check the
|
||||
* values of the window register.
|
||||
*/
|
||||
#define IS_WWDG_WINDOWLIMITVALUE_OK(WindowLimitValue) ((WindowLimitValue) <= 0x7F)
|
||||
|
||||
/**
|
||||
* @brief Macro used by the assert function in order to check the different
|
||||
* values of the counter register.
|
||||
*/
|
||||
#define IS_WWDG_COUNTERVALUE_OK(CounterValue) ((CounterValue) <= 0x7F)
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/* Exported types ------------------------------------------------------------*/
|
||||
|
||||
/* Exported functions ------------------------------------------------------- */
|
||||
|
||||
/** @addtogroup WWDG_Exported_Functions
|
||||
* @{
|
||||
*/
|
||||
|
||||
void WWDG_Init(uint8_t Counter, uint8_t WindowValue);
|
||||
void WWDG_SetCounter(uint8_t Counter);
|
||||
uint8_t WWDG_GetCounter(void);
|
||||
void WWDG_SWReset(void);
|
||||
void WWDG_SetWindowValue(uint8_t WindowValue);
|
||||
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
#endif /* __STM8S_WWDG_H */
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
|
||||
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
|
||||
Reference in New Issue
Block a user