132 lines
3.8 KiB
C++
Executable File
132 lines
3.8 KiB
C++
Executable File
// Tencent is pleased to support the open source community by making ncnn available.
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//
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// Copyright (C) 2017 THL A29 Limited, a Tencent company. All rights reserved.
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//
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// Licensed under the BSD 3-Clause License (the "License"); you may not use this file except
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// in compliance with the License. You may obtain a copy of the License at
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//
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// https://opensource.org/licenses/BSD-3-Clause
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//
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// Unless required by applicable law or agreed to in writing, software distributed
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// under the License is distributed on an "AS IS" BASIS, WITHOUT WARRANTIES OR
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// CONDITIONS OF ANY KIND, either express or implied. See the License for the
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// specific language governing permissions and limitations under the License.
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#ifndef NCNN_CPU_H
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#define NCNN_CPU_H
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#include <stddef.h>
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#if defined __ANDROID__ || defined __linux__
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#include <sched.h> // cpu_set_t
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#endif
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#include "platform.h"
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namespace ncnn {
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class NCNN_EXPORT CpuSet
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{
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public:
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CpuSet();
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void enable(int cpu);
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void disable(int cpu);
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void disable_all();
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bool is_enabled(int cpu) const;
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int num_enabled() const;
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public:
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#if defined __ANDROID__ || defined __linux__
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cpu_set_t cpu_set;
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#endif
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#if __APPLE__
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unsigned int policy;
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#endif
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};
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// test optional cpu features
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// neon = armv7 neon or aarch64 asimd
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NCNN_EXPORT int cpu_support_arm_neon();
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// vfpv4 = armv7 fp16 + fma
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NCNN_EXPORT int cpu_support_arm_vfpv4();
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// asimdhp = aarch64 asimd half precision
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NCNN_EXPORT int cpu_support_arm_asimdhp();
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// asimddp = aarch64 asimd dot product
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NCNN_EXPORT int cpu_support_arm_asimddp();
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// avx = x86 avx
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NCNN_EXPORT int cpu_support_x86_avx();
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// fma = x86 fma
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NCNN_EXPORT int cpu_support_x86_fma();
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// xop = x86 xop
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NCNN_EXPORT int cpu_support_x86_xop();
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// f16c = x86 f16c
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NCNN_EXPORT int cpu_support_x86_f16c();
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// avx2 = x86 avx2 + fma + f16c
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NCNN_EXPORT int cpu_support_x86_avx2();
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// avx_vnni = x86 avx vnni
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NCNN_EXPORT int cpu_support_x86_avx_vnni();
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// avx512 = x86 avx512f + avx512cd + avx512bw + avx512dq + avx512vl
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NCNN_EXPORT int cpu_support_x86_avx512();
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// avx512_vnni = x86 avx512 vnni
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NCNN_EXPORT int cpu_support_x86_avx512_vnni();
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// msa = mips mas
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NCNN_EXPORT int cpu_support_mips_msa();
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// mmi = loongson mmi
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NCNN_EXPORT int cpu_support_loongson_mmi();
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// v = riscv vector
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NCNN_EXPORT int cpu_support_riscv_v();
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// zfh = riscv half-precision float
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NCNN_EXPORT int cpu_support_riscv_zfh();
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// vlenb = riscv vector length in bytes
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NCNN_EXPORT int cpu_riscv_vlenb();
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// cpu info
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NCNN_EXPORT int get_cpu_count();
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NCNN_EXPORT int get_little_cpu_count();
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NCNN_EXPORT int get_big_cpu_count();
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// bind all threads on little clusters if powersave enabled
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// affects HMP arch cpu like ARM big.LITTLE
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// only implemented on android at the moment
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// switching powersave is expensive and not thread-safe
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// 0 = all cores enabled(default)
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// 1 = only little clusters enabled
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// 2 = only big clusters enabled
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// return 0 if success for setter function
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NCNN_EXPORT int get_cpu_powersave();
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NCNN_EXPORT int set_cpu_powersave(int powersave);
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// convenient wrapper
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NCNN_EXPORT const CpuSet& get_cpu_thread_affinity_mask(int powersave);
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// set explicit thread affinity
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NCNN_EXPORT int set_cpu_thread_affinity(const CpuSet& thread_affinity_mask);
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// misc function wrapper for openmp routines
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NCNN_EXPORT int get_omp_num_threads();
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NCNN_EXPORT void set_omp_num_threads(int num_threads);
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NCNN_EXPORT int get_omp_dynamic();
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NCNN_EXPORT void set_omp_dynamic(int dynamic);
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NCNN_EXPORT int get_omp_thread_num();
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NCNN_EXPORT int get_kmp_blocktime();
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NCNN_EXPORT void set_kmp_blocktime(int time_ms);
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// need to flush denormals on Intel Chipset.
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// Other architectures such as ARM can be added as needed.
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// 0 = DAZ OFF, FTZ OFF
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// 1 = DAZ ON , FTZ OFF
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// 2 = DAZ OFF, FTZ ON
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// 3 = DAZ ON, FTZ ON
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NCNN_EXPORT int get_flush_denormals();
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NCNN_EXPORT int set_flush_denormals(int flush_denormals);
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} // namespace ncnn
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#endif // NCNN_CPU_H
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